From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v2] x86/gpu: add CFL to early quirks Date: Thu, 14 Dec 2017 12:33:23 +0200 Message-ID: <877etpr43w.fsf@intel.com> References: <20171213200425.2954-1-lucas.demarchi@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20171213200425.2954-1-lucas.demarchi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: intel-gfx@lists.freedesktop.org Cc: Anusha Srivatsa , "H . Peter Anvin" , David Airlie , Joonas Lahtinen , Lucas De Marchi , x86@kernel.org, dri-devel@lists.freedesktop.org, stable@vger.kernel.org, Rodrigo Vivi , Thomas Gleixner , Ingo Molnar List-Id: dri-devel@lists.freedesktop.org T24gV2VkLCAxMyBEZWMgMjAxNywgTHVjYXMgRGUgTWFyY2hpIDxsdWNhcy5kZW1hcmNoaUBpbnRl bC5jb20+IHdyb3RlOgo+IENGTCB3YXMgbWlzc2luZyBmcm9tIGludGVsX2Vhcmx5X2lkc1tdLiBU aGUgUENJIElEIG5lZWRzIHRvIGJlIHRoZXJlIHRvCj4gYWxsb3cgdGhlIG1lbW9yeSByZWdpb24g dG8gYmUgc3RvbGVuLCBvdGhlcndpc2Ugd2UgY291bGQgaGF2ZSBSQU0gYmVpbmcKPiBhcmJpdHJh cmlseSBvdmVyd3JpdHRlbiBpZiBmb3IgZXhhbXBsZSB3ZSBrZWVwIHVzaW5nIHRoZSBVRUZJIGZy YW1lYnVmZmVyLAo+IGRlcGVuZGluZyBvbiBob3cgQklPUyBoYXMgc2V0IHVwIHRoZSBlODIwIG1h cC4KPgo+IEZpeGVzOiBiMDU2ZjhmM2Q2YjkgKCJkcm0vaTkxNS9jZmw6IEFkZCBDb2ZmZWUgTGFr ZSBQQ0kgSURzIGZvciBTIFNrdXMuIikKPiBTaWduZWQtb2ZmLWJ5OiBMdWNhcyBEZSBNYXJjaGkg PGx1Y2FzLmRlbWFyY2hpQGludGVsLmNvbT4KPiBDYzogUm9kcmlnbyBWaXZpIDxyb2RyaWdvLnZp dmlAaW50ZWwuY29tPgo+IENjOiBBbnVzaGEgU3JpdmF0c2EgPGFudXNoYS5zcml2YXRzYUBpbnRl bC5jb20+Cj4gQ2M6IEphbmkgTmlrdWxhIDxqYW5pLm5pa3VsYUBsaW51eC5pbnRlbC5jb20+Cj4g Q2M6IEpvb25hcyBMYWh0aW5lbiA8am9vbmFzLmxhaHRpbmVuQGxpbnV4LmludGVsLmNvbT4KPiBD YzogRGF2aWQgQWlybGllIDxhaXJsaWVkQGxpbnV4LmllPgo+IENjOiBpbnRlbC1nZnhAbGlzdHMu ZnJlZWRlc2t0b3Aub3JnCj4gQ2M6IGRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKPiBD YzogSW5nbyBNb2xuYXIgPG1pbmdvQGtlcm5lbC5vcmc+Cj4gQ2M6IEguIFBldGVyIEFudmluIDxo cGFAenl0b3IuY29tPgo+IENjOiBUaG9tYXMgR2xlaXhuZXIgPHRnbHhAbGludXRyb25peC5kZT4K PiBDYzogeDg2QGtlcm5lbC5vcmcKPiBDYzogPHN0YWJsZUB2Z2VyLmtlcm5lbC5vcmc+ICMgdjQu MTMrIDA4OTA1NDBlMjFjZiBkcm0vaTkxNTogYWRkIEdUIG51bWJlciB0byBpbnRlbF9kZXZpY2Vf aW5mbwo+IENjOiA8c3RhYmxlQHZnZXIua2VybmVsLm9yZz4gIyB2NC4xMysgNDE2OTNmZDUyMzcz IGRybS9pOTE1L2tibDogQ2hhbmdlIGEgS0JMIHBjaSBpZCB0byBHVDIgZnJvbSBHVDEuNQo+IENj OiA8c3RhYmxlQHZnZXIua2VybmVsLm9yZz4gIyB2NC4xMysKCkFncmVlZCBvbiB0aGUgRml4ZXM6 IGFuZCBDYzogc3RhYmxlIGhlcmUuCgpBY2tlZC1ieTogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxh QGludGVsLmNvbT4KCj4gUmV2aWV3ZWQtYnk6IFJvZHJpZ28gVml2aSA8cm9kcmlnby52aXZpQGlu dGVsLmNvbT4KPiAtLS0KPgo+IHYyOiBpbXByb3ZlIGNvbW1pdCBtZXNzYWdlLCBhZGQgRml4ZXMg dGFnIGFuZCBDQyBzdGFibGUKPgo+ICBhcmNoL3g4Ni9rZXJuZWwvZWFybHktcXVpcmtzLmMgfCAx ICsKPiAgaW5jbHVkZS9kcm0vaTkxNV9wY2lpZHMuaCAgICAgIHwgNiArKysrKysKPiAgMiBmaWxl cyBjaGFuZ2VkLCA3IGluc2VydGlvbnMoKykKPgo+IGRpZmYgLS1naXQgYS9hcmNoL3g4Ni9rZXJu ZWwvZWFybHktcXVpcmtzLmMgYi9hcmNoL3g4Ni9rZXJuZWwvZWFybHktcXVpcmtzLmMKPiBpbmRl eCAzY2JiMmM3OGE5ZGYuLmJhZTBkMzJlMzI3YiAxMDA2NDQKPiAtLS0gYS9hcmNoL3g4Ni9rZXJu ZWwvZWFybHktcXVpcmtzLmMKPiArKysgYi9hcmNoL3g4Ni9rZXJuZWwvZWFybHktcXVpcmtzLmMK PiBAQCAtNTI4LDYgKzUyOCw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgcGNpX2RldmljZV9pZCBp bnRlbF9lYXJseV9pZHNbXSBfX2luaXRjb25zdCA9IHsKPiAgCUlOVEVMX1NLTF9JRFMoJmdlbjlf ZWFybHlfb3BzKSwKPiAgCUlOVEVMX0JYVF9JRFMoJmdlbjlfZWFybHlfb3BzKSwKPiAgCUlOVEVM X0tCTF9JRFMoJmdlbjlfZWFybHlfb3BzKSwKPiArCUlOVEVMX0NGTF9JRFMoJmdlbjlfZWFybHlf b3BzKSwKPiAgCUlOVEVMX0dMS19JRFMoJmdlbjlfZWFybHlfb3BzKSwKPiAgCUlOVEVMX0NOTF9J RFMoJmdlbjlfZWFybHlfb3BzKSwKPiAgfTsKPiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS9kcm0vaTkx NV9wY2lpZHMuaCBiL2luY2x1ZGUvZHJtL2k5MTVfcGNpaWRzLmgKPiBpbmRleCA5NzJhMjU2MzM1 MjUuLmM2NWU0NDg5MDA2ZCAxMDA2NDQKPiAtLS0gYS9pbmNsdWRlL2RybS9pOTE1X3BjaWlkcy5o Cj4gKysrIGIvaW5jbHVkZS9kcm0vaTkxNV9wY2lpZHMuaAo+IEBAIC0zOTIsNiArMzkyLDEyIEBA Cj4gIAlJTlRFTF9WR0FfREVWSUNFKDB4M0VBOCwgaW5mbyksIC8qIFVMVCBHVDMgKi8gXAo+ICAJ SU5URUxfVkdBX0RFVklDRSgweDNFQTUsIGluZm8pICAvKiBVTFQgR1QzICovCj4gIAo+ICsjZGVm aW5lIElOVEVMX0NGTF9JRFMoaW5mbykgXAo+ICsJSU5URUxfQ0ZMX1NfR1QxX0lEUyhpbmZvKSwg XAo+ICsJSU5URUxfQ0ZMX1NfR1QyX0lEUyhpbmZvKSwgXAo+ICsJSU5URUxfQ0ZMX0hfR1QyX0lE UyhpbmZvKSwgXAo+ICsJSU5URUxfQ0ZMX1VfR1QzX0lEUyhpbmZvKQo+ICsKPiAgLyogQ05MIFUg MisyICovCj4gICNkZWZpbmUgSU5URUxfQ05MX1VfR1QyX0lEUyhpbmZvKSBcCj4gIAlJTlRFTF9W R0FfREVWSUNFKDB4NUE1MiwgaW5mbyksIFwKCi0tIApKYW5pIE5pa3VsYSwgSW50ZWwgT3BlbiBT b3VyY2UgVGVjaG5vbG9neSBDZW50ZXIKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJl ZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGlu Zm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com ([134.134.136.65]:50833 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750808AbdLNKdc (ORCPT ); Thu, 14 Dec 2017 05:33:32 -0500 From: Jani Nikula To: Lucas De Marchi , intel-gfx@lists.freedesktop.org Cc: Lucas De Marchi , Rodrigo Vivi , Anusha Srivatsa , Joonas Lahtinen , David Airlie , dri-devel@lists.freedesktop.org, Ingo Molnar , "H . Peter Anvin" , Thomas Gleixner , x86@kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v2] x86/gpu: add CFL to early quirks In-Reply-To: <20171213200425.2954-1-lucas.demarchi@intel.com> References: <20171213200425.2954-1-lucas.demarchi@intel.com> Date: Thu, 14 Dec 2017 12:33:23 +0200 Message-ID: <877etpr43w.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: stable-owner@vger.kernel.org List-ID: On Wed, 13 Dec 2017, Lucas De Marchi wrote: > CFL was missing from intel_early_ids[]. The PCI ID needs to be there to > allow the memory region to be stolen, otherwise we could have RAM being > arbitrarily overwritten if for example we keep using the UEFI framebuffer, > depending on how BIOS has set up the e820 map. > > Fixes: b056f8f3d6b9 ("drm/i915/cfl: Add Coffee Lake PCI IDs for S Skus.") > Signed-off-by: Lucas De Marchi > Cc: Rodrigo Vivi > Cc: Anusha Srivatsa > Cc: Jani Nikula > Cc: Joonas Lahtinen > Cc: David Airlie > Cc: intel-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Cc: Ingo Molnar > Cc: H. Peter Anvin > Cc: Thomas Gleixner > Cc: x86@kernel.org > Cc: # v4.13+ 0890540e21cf drm/i915: add GT number to intel_device_info > Cc: # v4.13+ 41693fd52373 drm/i915/kbl: Change a KBL pci id to GT2 from GT1.5 > Cc: # v4.13+ Agreed on the Fixes: and Cc: stable here. Acked-by: Jani Nikula > Reviewed-by: Rodrigo Vivi > --- > > v2: improve commit message, add Fixes tag and CC stable > > arch/x86/kernel/early-quirks.c | 1 + > include/drm/i915_pciids.h | 6 ++++++ > 2 files changed, 7 insertions(+) > > diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c > index 3cbb2c78a9df..bae0d32e327b 100644 > --- a/arch/x86/kernel/early-quirks.c > +++ b/arch/x86/kernel/early-quirks.c > @@ -528,6 +528,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = { > INTEL_SKL_IDS(&gen9_early_ops), > INTEL_BXT_IDS(&gen9_early_ops), > INTEL_KBL_IDS(&gen9_early_ops), > + INTEL_CFL_IDS(&gen9_early_ops), > INTEL_GLK_IDS(&gen9_early_ops), > INTEL_CNL_IDS(&gen9_early_ops), > }; > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h > index 972a25633525..c65e4489006d 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -392,6 +392,12 @@ > INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \ > INTEL_VGA_DEVICE(0x3EA5, info) /* ULT GT3 */ > > +#define INTEL_CFL_IDS(info) \ > + INTEL_CFL_S_GT1_IDS(info), \ > + INTEL_CFL_S_GT2_IDS(info), \ > + INTEL_CFL_H_GT2_IDS(info), \ > + INTEL_CFL_U_GT3_IDS(info) > + > /* CNL U 2+2 */ > #define INTEL_CNL_U_GT2_IDS(info) \ > INTEL_VGA_DEVICE(0x5A52, info), \ -- Jani Nikula, Intel Open Source Technology Center