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From: Jani Nikula <jani.nikula@linux.intel.com>
To: jim.bride@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor
Date: Thu, 28 May 2015 13:33:50 +0300	[thread overview]
Message-ID: <877frtgfe9.fsf@intel.com> (raw)
In-Reply-To: <87iobdwa81.fsf@intel.com>

On Thu, 28 May 2015, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Wed, 27 May 2015, jim.bride@linux.intel.com wrote:
>> From: Jim Bride <jim.bride@linux.intel.com>
>>
>> According to the HSW b-spec we need to try clock divisors of 63
>> and 72, each 3 or more times, when attempting DP AUX channel
>> communication on a server chipset.  This actually wasn't happening
>> due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit
>> in status rather than checking that the operation was done and
>> that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set.
>>
>> [v2] Implemented alternate solution suggested by Jani Nikula.
>>
>> Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
>
> Cc: stable@vger.kernel.org
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

...and pushed to drm-intel-fixes, thanks for the patch.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/intel_dp.c | 5 ++---
>>  1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 0edc305..7d1e024 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -893,10 +893,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>>  				continue;
>>  			}
>>  			if (status & DP_AUX_CH_CTL_DONE)
>> -				break;
>> +				goto done;
>>  		}
>> -		if (status & DP_AUX_CH_CTL_DONE)
>> -			break;
>>  	}
>>  
>>  	if ((status & DP_AUX_CH_CTL_DONE) == 0) {
>> @@ -905,6 +903,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>>  		goto out;
>>  	}
>>  
>> +done:
>>  	/* Check for timeout or receive error.
>>  	 * Timeouts occur when the sink is not connected
>>  	 */
>> -- 
>> 1.9.1
>>
>
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Jani Nikula, Intel Open Source Technology Center
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

      reply	other threads:[~2015-05-28 10:32 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-27 17:21 [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor jim.bride
2015-05-28  5:18 ` Jani Nikula
2015-05-28 10:33   ` Jani Nikula [this message]

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