From: Andi Kleen <andi@firstfloor.org>
To: ling.ma.program@gmail.com
Cc: mingo@redhat.com, tglx@linutronix.de, hpa@zytor.com,
neleai@seznam.cz, linux-kernel@vger.kernel.org,
Ling Ma <ling.ml@alibaba-inc.com>
Subject: Re: [PATCH RFC] x86:Improve memset with general 64bit instruction
Date: Mon, 07 Apr 2014 09:42:27 -0700 [thread overview]
Message-ID: <877g71jdl8.fsf@tassilo.jf.intel.com> (raw)
In-Reply-To: <1396882237-27608-1-git-send-email-ling.ma@alipay.com> (ling ma program's message of "Mon, 7 Apr 2014 10:50:37 -0400")
ling.ma.program@gmail.com writes:
> From: Ling Ma <ling.ml@alibaba-inc.com>
>
> In this patch we manage to reduce miss branch prediction by
> avoiding using branch instructions and force destination to be aligned
> with general 64bit instruction.
> Below compared results shows we improve performance up to 1.8x
> (We modified test suit from Ondra, send after this patch)
You didn't specify the CPU?
I assume it's some Atom, as nothing else uses these open coded functions
anymore?
-Andi
--
ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2014-04-07 18:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-07 14:50 [PATCH RFC] x86:Improve memset with general 64bit instruction ling.ma.program
2014-04-07 14:52 ` Ling Ma
2014-04-07 16:42 ` Andi Kleen [this message]
2014-04-08 14:00 ` Ling Ma
2014-04-13 15:11 ` Ling Ma
2014-04-13 22:03 ` Andi Kleen
2014-04-14 13:31 ` Ling Ma
2014-04-15 5:01 ` Andi Kleen
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