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charset=US-ASCII Message-ID-Hash: B62FAPEXQ52CGQESQ2IAEH4Q6MFR2WPN X-Message-ID-Hash: B62FAPEXQ52CGQESQ2IAEH4Q6MFR2WPN X-MailFrom: tiwai@suse.de X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On Thu, 06 Apr 2023 10:13:44 +0200, Oswald Buddenhagen wrote: > > On Thu, Apr 06, 2023 at 09:56:06AM +0200, Takashi Iwai wrote: > > No, the point is that, if an irq handler misses the multiple period > > updates, it has to handle the situation in a single shot, and the > > offset gets corrected to the value within the period size; > > > i know. my point is that if that happens, something must have gone > more or less terribly wrong already, and we should be thinking about > how to prevent that, rather than how to "reliably" paper over the > problem. but i suppose we can give the hardware some slack ... if more > than two periods are configured. You can't prevent it perfectly. The execution of an irq handler may be delayed by various reasons, and whether it happens or not can't be deterministic. The same driver code and the configuration might not work on a slower machine, too. So you'll still need to handle such errors in a proper manner. thanks, Takashi