From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Date: Fri, 05 May 2017 05:49:32 +0000 Subject: Re: [PATCH 6/9] drm/i915: Add spaces for better code readability Message-Id: <878tmbyhsj.fsf@intel.com> List-Id: References: <39c8a155-cf89-1aa5-9ca6-4e9ccf3aa602@users.sourceforge.net> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: SF Markus Elfring , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Chris Wilson , Daniel Vetter , David Airlie Cc: kernel-janitors@vger.kernel.org, LKML On Thu, 04 May 2017, SF Markus Elfring wrote: > From: Markus Elfring > Date: Thu, 4 May 2017 14:04:38 +0200 > > Use space characters at some source code places according to > the Linux coding style convention. LGTM. Frankly the only concern I have with accepting this patch is that it encourages you and others to submit more patches like this. Generally, we do this kind of changes only when touching the nearby code for some real changes. BR, Jani. > > Signed-off-by: Markus Elfring > --- > drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index d9c699d7245e..6f3119d40c50 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2358,7 +2358,7 @@ static int i915_llc(struct seq_file *m, void *data) > > seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev_priv))); > seq_printf(m, "%s: %lluMB\n", edram ? "eDRAM" : "eLLC", > - intel_uncore_edram_size(dev_priv)/1024/1024); > + intel_uncore_edram_size(dev_priv) / 1024 / 1024); > > return 0; > } > @@ -4502,7 +4502,7 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, > { > int s_max = 3, ss_max = 4; > int s, ss; > - u32 s_reg[s_max], eu_reg[2*s_max], eu_mask[2]; > + u32 s_reg[s_max], eu_reg[2 * s_max], eu_mask[2]; > > /* BXT has a single slice and at most 3 subslices. */ > if (IS_GEN9_LP(dev_priv)) { > @@ -4512,8 +4512,8 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, > > for (s = 0; s < s_max; s++) { > s_reg[s] = I915_READ(GEN9_SLICE_PGCTL_ACK(s)); > - eu_reg[2*s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s)); > - eu_reg[2*s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s)); > + eu_reg[2 * s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s)); > + eu_reg[2 * s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s)); > } > > eu_mask[0] = GEN9_PGCTL_SSA_EU08_ACK | > @@ -4547,8 +4547,8 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, > sseu->subslice_mask |= BIT(ss); > } > > - eu_cnt = 2 * hweight32(eu_reg[2*s + ss/2] & > - eu_mask[ss%2]); > + eu_cnt = 2 * hweight32(eu_reg[2 * s + ss / 2] & > + eu_mask[ss % 2]); > sseu->eu_total += eu_cnt; > sseu->eu_per_subslice = max_t(unsigned int, > sseu->eu_per_subslice, -- Jani Nikula, Intel Open Source Technology Center From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH 6/9] drm/i915: Add spaces for better code readability Date: Fri, 05 May 2017 08:49:32 +0300 Message-ID: <878tmbyhsj.fsf@intel.com> References: <39c8a155-cf89-1aa5-9ca6-4e9ccf3aa602@users.sourceforge.net> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: SF Markus Elfring , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Chris Wilson , Daniel Vetter , David Airlie Cc: kernel-janitors@vger.kernel.org, LKML List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCAwNCBNYXkgMjAxNywgU0YgTWFya3VzIEVsZnJpbmcgPGVsZnJpbmdAdXNlcnMuc291 cmNlZm9yZ2UubmV0PiB3cm90ZToKPiBGcm9tOiBNYXJrdXMgRWxmcmluZyA8ZWxmcmluZ0B1c2Vy cy5zb3VyY2Vmb3JnZS5uZXQ+Cj4gRGF0ZTogVGh1LCA0IE1heSAyMDE3IDE0OjA0OjM4ICswMjAw Cj4KPiBVc2Ugc3BhY2UgY2hhcmFjdGVycyBhdCBzb21lIHNvdXJjZSBjb2RlIHBsYWNlcyBhY2Nv cmRpbmcgdG8KPiB0aGUgTGludXggY29kaW5nIHN0eWxlIGNvbnZlbnRpb24uCgpMR1RNLiBGcmFu a2x5IHRoZSBvbmx5IGNvbmNlcm4gSSBoYXZlIHdpdGggYWNjZXB0aW5nIHRoaXMgcGF0Y2ggaXMg dGhhdAppdCBlbmNvdXJhZ2VzIHlvdSBhbmQgb3RoZXJzIHRvIHN1Ym1pdCBtb3JlIHBhdGNoZXMg bGlrZQp0aGlzLiBHZW5lcmFsbHksIHdlIGRvIHRoaXMga2luZCBvZiBjaGFuZ2VzIG9ubHkgd2hl biB0b3VjaGluZyB0aGUKbmVhcmJ5IGNvZGUgZm9yIHNvbWUgcmVhbCBjaGFuZ2VzLgoKQlIsCkph bmkuCgo+Cj4gU2lnbmVkLW9mZi1ieTogTWFya3VzIEVsZnJpbmcgPGVsZnJpbmdAdXNlcnMuc291 cmNlZm9yZ2UubmV0Pgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2RlYnVnZnMu YyB8IDEyICsrKysrKy0tLS0tLQo+ICAxIGZpbGUgY2hhbmdlZCwgNiBpbnNlcnRpb25zKCspLCA2 IGRlbGV0aW9ucygtKQo+Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVf ZGVidWdmcy5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kZWJ1Z2ZzLmMKPiBpbmRleCBk OWM2OTlkNzI0NWUuLjZmMzExOWQ0MGM1MCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pOTE1X2RlYnVnZnMuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZGVi dWdmcy5jCj4gQEAgLTIzNTgsNyArMjM1OCw3IEBAIHN0YXRpYyBpbnQgaTkxNV9sbGMoc3RydWN0 IHNlcV9maWxlICptLCB2b2lkICpkYXRhKQo+ICAKPiAgCXNlcV9wcmludGYobSwgIkxMQzogJXNc biIsIHllc25vKEhBU19MTEMoZGV2X3ByaXYpKSk7Cj4gIAlzZXFfcHJpbnRmKG0sICIlczogJWxs dU1CXG4iLCBlZHJhbSA/ICJlRFJBTSIgOiAiZUxMQyIsCj4gLQkJICAgaW50ZWxfdW5jb3JlX2Vk cmFtX3NpemUoZGV2X3ByaXYpLzEwMjQvMTAyNCk7Cj4gKwkJICAgaW50ZWxfdW5jb3JlX2VkcmFt X3NpemUoZGV2X3ByaXYpIC8gMTAyNCAvIDEwMjQpOwo+ICAKPiAgCXJldHVybiAwOwo+ICB9Cj4g QEAgLTQ1MDIsNyArNDUwMiw3IEBAIHN0YXRpYyB2b2lkIGdlbjlfc3NldV9kZXZpY2Vfc3RhdHVz KHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiwKPiAgewo+ICAJaW50IHNfbWF4ID0g Mywgc3NfbWF4ID0gNDsKPiAgCWludCBzLCBzczsKPiAtCXUzMiBzX3JlZ1tzX21heF0sIGV1X3Jl Z1syKnNfbWF4XSwgZXVfbWFza1syXTsKPiArCXUzMiBzX3JlZ1tzX21heF0sIGV1X3JlZ1syICog c19tYXhdLCBldV9tYXNrWzJdOwo+ICAKPiAgCS8qIEJYVCBoYXMgYSBzaW5nbGUgc2xpY2UgYW5k IGF0IG1vc3QgMyBzdWJzbGljZXMuICovCj4gIAlpZiAoSVNfR0VOOV9MUChkZXZfcHJpdikpIHsK PiBAQCAtNDUxMiw4ICs0NTEyLDggQEAgc3RhdGljIHZvaWQgZ2VuOV9zc2V1X2RldmljZV9zdGF0 dXMoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2LAo+ICAKPiAgCWZvciAocyA9IDA7 IHMgPCBzX21heDsgcysrKSB7Cj4gIAkJc19yZWdbc10gPSBJOTE1X1JFQUQoR0VOOV9TTElDRV9Q R0NUTF9BQ0socykpOwo+IC0JCWV1X3JlZ1syKnNdID0gSTkxNV9SRUFEKEdFTjlfU1MwMV9FVV9Q R0NUTF9BQ0socykpOwo+IC0JCWV1X3JlZ1syKnMgKyAxXSA9IEk5MTVfUkVBRChHRU45X1NTMjNf RVVfUEdDVExfQUNLKHMpKTsKPiArCQlldV9yZWdbMiAqIHNdID0gSTkxNV9SRUFEKEdFTjlfU1Mw MV9FVV9QR0NUTF9BQ0socykpOwo+ICsJCWV1X3JlZ1syICogcyArIDFdID0gSTkxNV9SRUFEKEdF TjlfU1MyM19FVV9QR0NUTF9BQ0socykpOwo+ICAJfQo+ICAKPiAgCWV1X21hc2tbMF0gPSBHRU45 X1BHQ1RMX1NTQV9FVTA4X0FDSyB8Cj4gQEAgLTQ1NDcsOCArNDU0Nyw4IEBAIHN0YXRpYyB2b2lk IGdlbjlfc3NldV9kZXZpY2Vfc3RhdHVzKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJp diwKPiAgCQkJCXNzZXUtPnN1YnNsaWNlX21hc2sgfD0gQklUKHNzKTsKPiAgCQkJfQo+ICAKPiAt CQkJZXVfY250ID0gMiAqIGh3ZWlnaHQzMihldV9yZWdbMipzICsgc3MvMl0gJgo+IC0JCQkJCSAg ICAgICBldV9tYXNrW3NzJTJdKTsKPiArCQkJZXVfY250ID0gMiAqIGh3ZWlnaHQzMihldV9yZWdb MiAqIHMgKyBzcyAvIDJdICYKPiArCQkJCQkgICAgICAgZXVfbWFza1tzcyAlIDJdKTsKPiAgCQkJ c3NldS0+ZXVfdG90YWwgKz0gZXVfY250Owo+ICAJCQlzc2V1LT5ldV9wZXJfc3Vic2xpY2UgPSBt YXhfdCh1bnNpZ25lZCBpbnQsCj4gIAkJCQkJCSAgICAgIHNzZXUtPmV1X3Blcl9zdWJzbGljZSwK Ci0tIApKYW5pIE5pa3VsYSwgSW50ZWwgT3BlbiBTb3VyY2UgVGVjaG5vbG9neSBDZW50ZXIKX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1h aWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMu ZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755272AbdEEFto (ORCPT ); Fri, 5 May 2017 01:49:44 -0400 Received: from mga04.intel.com ([192.55.52.120]:7864 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751101AbdEEFtm (ORCPT ); Fri, 5 May 2017 01:49:42 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,291,1491289200"; d="scan'208";a="853140756" From: Jani Nikula To: SF Markus Elfring , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Chris Wilson , Daniel Vetter , David Airlie Cc: LKML , kernel-janitors@vger.kernel.org Subject: Re: [PATCH 6/9] drm/i915: Add spaces for better code readability In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <39c8a155-cf89-1aa5-9ca6-4e9ccf3aa602@users.sourceforge.net> Date: Fri, 05 May 2017 08:49:32 +0300 Message-ID: <878tmbyhsj.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 04 May 2017, SF Markus Elfring wrote: > From: Markus Elfring > Date: Thu, 4 May 2017 14:04:38 +0200 > > Use space characters at some source code places according to > the Linux coding style convention. LGTM. Frankly the only concern I have with accepting this patch is that it encourages you and others to submit more patches like this. Generally, we do this kind of changes only when touching the nearby code for some real changes. BR, Jani. > > Signed-off-by: Markus Elfring > --- > drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index d9c699d7245e..6f3119d40c50 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2358,7 +2358,7 @@ static int i915_llc(struct seq_file *m, void *data) > > seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev_priv))); > seq_printf(m, "%s: %lluMB\n", edram ? "eDRAM" : "eLLC", > - intel_uncore_edram_size(dev_priv)/1024/1024); > + intel_uncore_edram_size(dev_priv) / 1024 / 1024); > > return 0; > } > @@ -4502,7 +4502,7 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, > { > int s_max = 3, ss_max = 4; > int s, ss; > - u32 s_reg[s_max], eu_reg[2*s_max], eu_mask[2]; > + u32 s_reg[s_max], eu_reg[2 * s_max], eu_mask[2]; > > /* BXT has a single slice and at most 3 subslices. */ > if (IS_GEN9_LP(dev_priv)) { > @@ -4512,8 +4512,8 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, > > for (s = 0; s < s_max; s++) { > s_reg[s] = I915_READ(GEN9_SLICE_PGCTL_ACK(s)); > - eu_reg[2*s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s)); > - eu_reg[2*s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s)); > + eu_reg[2 * s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s)); > + eu_reg[2 * s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s)); > } > > eu_mask[0] = GEN9_PGCTL_SSA_EU08_ACK | > @@ -4547,8 +4547,8 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, > sseu->subslice_mask |= BIT(ss); > } > > - eu_cnt = 2 * hweight32(eu_reg[2*s + ss/2] & > - eu_mask[ss%2]); > + eu_cnt = 2 * hweight32(eu_reg[2 * s + ss / 2] & > + eu_mask[ss % 2]); > sseu->eu_total += eu_cnt; > sseu->eu_per_subslice = max_t(unsigned int, > sseu->eu_per_subslice, -- Jani Nikula, Intel Open Source Technology Center