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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/10] drm/i915: Remove superfluous powersave work flushing
Date: Mon, 11 Jul 2016 17:11:08 +0300	[thread overview]
Message-ID: <878tx8tgcj.fsf@intel.com> (raw)
In-Reply-To: <1468055535-19740-8-git-send-email-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Instead of flushing the outstanding enabling, remember the requested
> frequency to apply when the powersave work runs.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 30 ++-------------------
>  drivers/gpu/drm/i915/i915_sysfs.c   | 52 ++++++++++---------------------------
>  2 files changed, 16 insertions(+), 66 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d1ff4cb9b90e..90aef4540193 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1205,8 +1205,6 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
>  
>  	intel_runtime_pm_get(dev_priv);
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	if (IS_GEN5(dev)) {
>  		u16 rgvswctl = I915_READ16(MEMSWCTL);
>  		u16 rgvstat = I915_READ16(MEMSTAT_ILK);
> @@ -1898,8 +1896,6 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
>  
>  	intel_runtime_pm_get(dev_priv);
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
>  	if (ret)
>  		goto out;
> @@ -4952,20 +4948,11 @@ i915_max_freq_get(void *data, u64 *val)
>  {
>  	struct drm_device *dev = data;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	int ret;
>  
>  	if (INTEL_INFO(dev)->gen < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> -	if (ret)
> -		return ret;
> -
>  	*val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
>  	return 0;
>  }
>  
> @@ -4980,8 +4967,6 @@ i915_max_freq_set(void *data, u64 val)
>  	if (INTEL_INFO(dev)->gen < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
>  
>  	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> @@ -5019,20 +5004,11 @@ i915_min_freq_get(void *data, u64 *val)
>  {
>  	struct drm_device *dev = data;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	int ret;
>  
> -	if (INTEL_INFO(dev)->gen < 6)
> +	if (INTEL_GEN(dev_priv) < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> -	if (ret)
> -		return ret;
> -
>  	*val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
>  	return 0;
>  }
>  
> @@ -5044,11 +5020,9 @@ i915_min_freq_set(void *data, u64 val)
>  	u32 hw_max, hw_min;
>  	int ret;
>  
> -	if (INTEL_INFO(dev)->gen < 6)
> +	if (INTEL_GEN(dev_priv) < 6)
>  		return -ENODEV;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
>  
>  	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 8c045ff47f0e..d47281b4b1c1 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -271,8 +271,6 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev,
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  	int ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	intel_runtime_pm_get(dev_priv);
>  
>  	mutex_lock(&dev_priv->rps.hw_lock);
> @@ -303,19 +301,10 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
>  	struct drm_minor *minor = dev_to_drm_minor(kdev);
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	int ret;
> -
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	intel_runtime_pm_get(dev_priv);
> -
> -	mutex_lock(&dev_priv->rps.hw_lock);
> -	ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
>  
> -	intel_runtime_pm_put(dev_priv);
> -
> -	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.cur_freq));
>  }
>  
>  static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
> @@ -324,7 +313,8 @@ static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribu
>  	struct drm_i915_private *dev_priv = to_i915(minor->dev);
>  
>  	return snprintf(buf, PAGE_SIZE, "%d\n",
> -			intel_gpu_freq(dev_priv, dev_priv->rps.boost_freq));
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.boost_freq));
>  }
>  
>  static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
> @@ -360,9 +350,9 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  
> -	return snprintf(buf, PAGE_SIZE,
> -			"%d\n",
> -			intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.efficient_freq));
>  }
>  
>  static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
> @@ -370,15 +360,10 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute
>  	struct drm_minor *minor = dev_to_drm_minor(kdev);
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	int ret;
> -
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
>  
> -	mutex_lock(&dev_priv->rps.hw_lock);
> -	ret = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
> -	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.max_freq_softlimit));
>  }
>  
>  static ssize_t gt_max_freq_mhz_store(struct device *kdev,
> @@ -395,8 +380,6 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev,
>  	if (ret)
>  		return ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	intel_runtime_pm_get(dev_priv);
>  
>  	mutex_lock(&dev_priv->rps.hw_lock);
> @@ -438,15 +421,10 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute
>  	struct drm_minor *minor = dev_to_drm_minor(kdev);
>  	struct drm_device *dev = minor->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	int ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
> -	mutex_lock(&dev_priv->rps.hw_lock);
> -	ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
> -	mutex_unlock(&dev_priv->rps.hw_lock);
> -
> -	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
> +	return snprintf(buf, PAGE_SIZE, "%d\n",
> +			intel_gpu_freq(dev_priv,
> +				       dev_priv->rps.min_freq_softlimit));
>  }
>  
>  static ssize_t gt_min_freq_mhz_store(struct device *kdev,
> @@ -463,8 +441,6 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev,
>  	if (ret)
>  		return ret;
>  
> -	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> -
>  	intel_runtime_pm_get(dev_priv);
>  
>  	mutex_lock(&dev_priv->rps.hw_lock);
> -- 
> 2.8.1
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  reply	other threads:[~2016-07-11 14:11 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-09  9:12 Mika's rps/rc6 fixes Chris Wilson
2016-07-09  9:12 ` [PATCH 01/10] drm/i915/breadcrumbs: Queue hangcheck before sleeping Chris Wilson
2016-07-11 11:42   ` Mika Kuoppala
2016-07-09  9:12 ` [PATCH 02/10] drm/i915: Kick hangcheck from retire worker Chris Wilson
2016-07-11 12:21   ` Mika Kuoppala
2016-07-11 12:46     ` Chris Wilson
2016-07-09  9:12 ` [PATCH 03/10] drm/i915: Preserve current RPS frequency across init Chris Wilson
2016-07-09  9:12 ` [PATCH 04/10] drm/i915: Perform static RPS frequency setup before userspace Chris Wilson
2016-07-11 13:31   ` Mika Kuoppala
2016-07-09  9:12 ` [PATCH 05/10] drm/i915: Move overclocking detection to alongside RPS frequency detection Chris Wilson
2016-07-11 13:37   ` Mika Kuoppala
2016-07-09  9:12 ` [PATCH 06/10] drm/i915: Define a separate variable and control for RPS waitboost frequency Chris Wilson
2016-07-11 11:39   ` Mika Kuoppala
2016-07-11 11:49     ` Chris Wilson
2016-07-11 12:55       ` Mika Kuoppala
2016-07-11 13:09         ` Chris Wilson
2016-07-09  9:12 ` [PATCH 07/10] drm/i915: Remove superfluous powersave work flushing Chris Wilson
2016-07-11 14:11   ` Mika Kuoppala [this message]
2016-07-09  9:12 ` [PATCH 08/10] drm/i915: Defer enabling rc6 til after we submit the first batch/context Chris Wilson
2016-07-11 14:14   ` Mika Kuoppala
2016-07-11 14:24     ` Chris Wilson
2016-07-09  9:12 ` [PATCH 09/10] drm/i915: Hide gen6_update_ring_freq() Chris Wilson
2016-07-09  9:12 ` [PATCH 10/10] drm/i915: Remove temporary RPM wakeref assert disables Chris Wilson
2016-07-11 15:30   ` Mika Kuoppala
2016-07-09  9:58 ` ✗ Ro.CI.BAT: failure for series starting with [01/10] drm/i915/breadcrumbs: Queue hangcheck before sleeping Patchwork
2016-07-09 10:08   ` Chris Wilson

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