From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH 1/3] drm/i915: don't send DP "idle" pattern before "normal" on HSW PORT_A Date: Wed, 30 Jan 2013 21:33:06 +0200 Message-ID: <878v7a8o0d.fsf@intel.com> References: <1359484520-3577-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 680E0E5C30 for ; Wed, 30 Jan 2013 11:33:38 -0800 (PST) In-Reply-To: <1359484520-3577-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni , intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On the series, Reviewed-by: Jani Nikula On Tue, 29 Jan 2013, Paulo Zanoni wrote: > From: Paulo Zanoni > > The DP_TP_STATUS register for PORT_A doesn't exist. Our documentation > will be fixed soon, so the code does not match it for now. > > This solves "Timed out waiting for DP idle patterns" and "unclaimed > register" messages on eDP. > > V1: Was called "drm/i915: don't read DP_TP_STATUS(PORT_A)" > V2: Was called "drm/i915: don't send DP idle pattern before normal > pattern on HSW" > V3: Only change the code that touches PORT_A. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 51fd797..1b76b04 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1785,14 +1785,18 @@ intel_dp_set_link_train(struct intel_dp *intel_dp, > temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; > switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) { > case DP_TRAINING_PATTERN_DISABLE: > - temp |= DP_TP_CTL_LINK_TRAIN_IDLE; > - I915_WRITE(DP_TP_CTL(port), temp); > > - if (wait_for((I915_READ(DP_TP_STATUS(port)) & > - DP_TP_STATUS_IDLE_DONE), 1)) > - DRM_ERROR("Timed out waiting for DP idle patterns\n"); > + if (port != PORT_A) { > + temp |= DP_TP_CTL_LINK_TRAIN_IDLE; > + I915_WRITE(DP_TP_CTL(port), temp); > + > + if (wait_for((I915_READ(DP_TP_STATUS(port)) & > + DP_TP_STATUS_IDLE_DONE), 1)) > + DRM_ERROR("Timed out waiting for DP idle patterns\n"); > + > + temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; > + } > > - temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; > temp |= DP_TP_CTL_LINK_TRAIN_NORMAL; > > break; > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx