From: Kevin Hilman <khilman@deeprootsystems.com>
To: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: dwmw2@infradead.org, akpm@linux-foundation.org,
linux-mtd@lists.infradead.org,
davinci-linux-open-source@linux.davincidsp.com
Subject: Re: [PATCH v3] mtd-nand: davinci: correct 4-bit error correction
Date: Thu, 05 Aug 2010 11:35:30 -0700 [thread overview]
Message-ID: <878w4kvrf1.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1279521506-4537-1-git-send-email-sudhakar.raj@ti.com> (Sudhakar Rajashekhara's message of "Mon, 19 Jul 2010 12:08:26 +0530")
Sudhakar Rajashekhara <sudhakar.raj@ti.com> writes:
> On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the
> 4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and
> before waiting for the NAND Flash status register to be equal to 1, 2 or
> 3, we have to wait till the ECC HW goes to correction state. Without this
> wait, ECC correction calculations will not be proper.
>
> This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365
> EVMs.
>
> Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
> Acked-by: Sneha Narnakaje <nsnehaprabha@ti.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
prev parent reply other threads:[~2010-08-05 18:35 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-19 6:38 [PATCH v3] mtd-nand: davinci: correct 4-bit error correction Sudhakar Rajashekhara
2010-08-05 18:35 ` Kevin Hilman [this message]
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