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Wed, 22 Jul 2026 06:25:30 -0700 (PDT) Received: from draig.lan ([185.124.0.114]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47f85b9a5a2sm6616016f8f.7.2026.07.22.06.25.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jul 2026 06:25:29 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 756A85F7DE; Wed, 22 Jul 2026 14:25:28 +0100 (BST) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Cc: Peter Maydell , qemu-devel@nongnu.org, Richard Henderson Subject: Re: [PULL 20/71] target/arm: teach arm_cpu_has_work about halting reasons In-Reply-To: <90bbd0b0-dce4-4945-8ad9-96c895e712ed@oss.qualcomm.com> ("Philippe =?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Wed, 22 Jul 2026 13:07:29 +0200") References: <20260610161202.2235298-1-peter.maydell@linaro.org> <20260610161202.2235298-21-peter.maydell@linaro.org> <90bbd0b0-dce4-4945-8ad9-96c895e712ed@oss.qualcomm.com> User-Agent: mu4e 1.14.3-pre1; emacs 30.1 Date: Wed, 22 Jul 2026 14:25:28 +0100 Message-ID: <87a4rjrwaf.fsf@draig.linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Philippe Mathieu-Daud=C3=A9 writes: > Hi, > > On 10/6/26 18:11, Peter Maydell wrote: >> From: Alex Benn=C3=A9e >> With the advent of WFE and WFI we need to pay closer attention to >> the >> reason why the vCPU may be sleeping to figure out if we should wake >> it up. >> Create env->halt_reason to track this and then re-order the tests so >> we: >> - ignore everything is the vCPU is powered off >> - wake up if the event_register is set and we were in a WFE >> - otherwise any IRQ event does wake the vCPU up. >> Reviewed-by: Richard Henderson >> Signed-off-by: Alex Benn=C3=A9e >> Message-id: 20260529082948.363931-3-alex.bennee@linaro.org >> Signed-off-by: Peter Maydell >> --- >> target/arm/arm-powerctl.c | 6 +++--- >> target/arm/cpu.c | 40 +++++++++++++++++++++++++++----------- >> target/arm/cpu.h | 16 +++++++++++++++ >> target/arm/internals.h | 11 +++++++++++ >> target/arm/kvm.c | 5 +++-- >> target/arm/machine.c | 2 +- >> target/arm/tcg/op_helper.c | 3 +++ >> 7 files changed, 66 insertions(+), 17 deletions(-) > > This patch updated TCG and KVM but missed HVF and WHPX: > > - target/arm/hvf/hvf.c > - target/arm/whpx/whpx-all.c Do they need it if they implement cpus_accel->cpu_thread_is_idle? > > >> diff --git a/target/arm/internals.h b/target/arm/internals.h >> index 21cbd2b1db..b2035b9417 100644 >> --- a/target/arm/internals.h >> +++ b/target/arm/internals.h >> @@ -2063,4 +2063,15 @@ bool arm_cpu_match_cpreg_mig_tolerance(ARMCPU *cp= u, uint64_t kvmidx, >> ARMCPRegMigToleranceType type); >> +/** >> + * arm_set_cpu_power_state() - set power state synced with halt_reason >> + */ >> +static inline void arm_set_cpu_power_state(ARMCPU *cpu, ARMPSCIState st= ate) >> +{ >> + CPUARMState *env =3D &cpu->env; >> + >> + cpu->power_state =3D state; >> + env->halt_reason =3D state =3D=3D PSCI_OFF ? HALT_PSCI : NOT_HALTED; >> +} >> + >> #endif > Why not add/use a getter()? How do you mean? Add it as a CPUClass API? Seems overkill for what is currently handled internally by Arm. --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro