From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63BD83F7A82 for ; Fri, 17 Jul 2026 11:55:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784289341; cv=none; b=gierRotAgfkVl+UYiCglMKbZEX4Bb3+xKZPBSUVT4edv6lcb90oaegOUUVgh79AXh9I8isaHaGXWWfauEpbcqDrTnWphl3JSve/UpcGjmWP8JWsin2xP0pqFtppAyabmWOxMAas6aBSXxBSwNy8AkJWDcgJYzym9g0yVcTGOmOQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784289341; c=relaxed/simple; bh=9VNl3kwPKsiIRaWbFIJIf/bZWRu6H8ArKCkTG27eOHQ=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=hhgTNeSckv1Kg3KALxgX3sjpKzaZOYRSbqNUntwANPKlM/oqam6MLpBiJ1yLpdrEfCU+iph8BxvGGmrp9DOm4qvnbS2dlbuH0yjTdJXfdZoMBl9P1N1HvjfiPTD+TKJXj/5chgYIpGZWzv6xjTlUL+226qMAwukElrcN3nyLMnQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=yXXP7Pva; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="yXXP7Pva" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id EA9BF1A1055; Fri, 17 Jul 2026 11:55:33 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B542860361; Fri, 17 Jul 2026 11:55:33 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D107811BD013E; Fri, 17 Jul 2026 13:55:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1784289332; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=olb07j+R4KRuYDDsVWwKXD1OEB5dTfTfM1jnrVire4o=; b=yXXP7Pval4WDA/Rcwb+NuWA918Ql9SeQC53coAvcqFKI2q+nVCeCIPdGvZXsQK/cgmJwXu rxnEETip2qaGBb3miTiLJf4GlRcxIEarrHbRcUe6Wg7JqOuvahWSb/9V5GpX/fUkgky0Mj v49VDKAKy5ybZzFxAZTCgNTpj0kSz60ad2VmLEmVRMo+bN2pNuwl2RVKyLZ6QNfW9t3ZB7 OqAOjpLEkOCC+pE1qDa4MSZbEtOzaYyUutJQVVflfgOtkrDedwXov4HTmK70CLjiXbDRH7 llX5muQWl4ULLMzwqT/e0OaHceTR2WyHA2sd9kosxCUBYJi04OTD724YsF0LEQ== From: Miquel Raynal To: James Hilliard Cc: linux-mtd@lists.infradead.org, linux-sunxi@lists.linux.dev, Richard Weinberger , Vignesh Raghavendra , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Richard Genoud , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] mtd: rawnand: sunxi: fix H6/H616 controller timings In-Reply-To: <20260715013142.640977-1-james.hilliard1@gmail.com> (James Hilliard's message of "Tue, 14 Jul 2026 19:31:38 -0600") References: <20260715013142.640977-1-james.hilliard1@gmail.com> User-Agent: mu4e 1.12.7; emacs 30.2 Date: Fri, 17 Jul 2026 13:55:29 +0200 Message-ID: <87a4rpkez2.fsf@bootlin.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Hello James, On 14/07/2026 at 19:31:38 -06, James Hilliard w= rote: > The NAND timing calculation was written for the original A10 NDFC. It > assumes command and address setup and hold intervals T1-T4, T7 and T11 > are one controller clock and uses the A10 timing-register encodings. > > The H6/H616 NDFC instead defines those intervals as two internal clock > cycles and uses different encodings for tWB, tADL, tWHR and tRHW, as > documented in the H616 User Manual. > > Describe the timing characteristics in the controller capability data > so the clock solver can select a rate permitted by the NAND SDR timings > and program valid delay fields. Keep the legacy A10 behavior unchanged. > > Fixes: 88fd4e4deae8 ("mtd: rawnand: sunxi: Add support for H616 nand cont= roller") Cc: stable missing here > Signed-off-by: James Hilliard ... > @@ -1667,16 +1681,35 @@ static int sunxi_nfc_hw_ecc_write_oob(struct nand= _chip *nand, int page) > return nand_prog_page_end_op(nand); > } >=20=20 > -static const s32 tWB_lut[] =3D {6, 12, 16, 20}; > -static const s32 tRHW_lut[] =3D {4, 8, 12, 20}; > +static const struct sunxi_nfc_timings sun4i_a10_nfc_timings =3D { > + .setup_cycles =3D 1, > + .tWB =3D { 6, 12, 16, 20 }, > + .tADL =3D { 7, 15, 23, 31 }, > + .tWHR =3D { 7, 15, 23, 31 }, > + .tRHW =3D { 4, 8, 12, 20 }, > +}; This patch looks overall correct but must be split. For instance, the fact that you drop the LUT in favour of you own timing array shall be done in a preparation patch, without adding new timings, nor adding the new controller timings. Then in a second time you could add tADL and tWHR support, etc. > + > +static const struct sunxi_nfc_timings sun50i_h6_nfc_timings =3D { > + .setup_cycles =3D 2, > + .tWB =3D { 28, 44, 60, 76 }, > + .tADL =3D { 0, 12, 28, 44 }, > + .tWHR =3D { 0, 12, 28, 44 }, > + .tRHW =3D { 8, 24, 40, 56 }, > +}; > + > +static void sunxi_nand_update_min_period(u32 *min_period, u32 duration, > + unsigned int cycles) > +{ > + *min_period =3D max(*min_period, DIV_ROUND_UP(duration, cycles)); > +} >=20=20 > -static int _sunxi_nand_lookup_timing(const s32 *lut, int lut_size, u32 d= uration, > - u32 clk_period) > +static int sunxi_nand_lookup_timing(const u8 *lut, u32 duration, > + u32 clk_period) This change is fine but likely also unrelated and should (maybe) be moved i= n its own commit. > { > u32 clk_cycles =3D DIV_ROUND_UP(duration, clk_period); > int i; >=20=20 > - for (i =3D 0; i < lut_size; i++) { > + for (i =3D 0; i < SUNXI_NFC_TIMING_STEPS; i++) { > if (clk_cycles <=3D lut[i]) > return i; > } ... > @@ -1703,77 +1734,65 @@ static int sunxi_nfc_setup_interface(struct nand_= chip *nand, int csline, > return -ENOTSUPP; >=20=20 > /* T1 <=3D> tCLS */ > - if (timings->tCLS_min > min_clk_period) > - min_clk_period =3D timings->tCLS_min; > + sunxi_nand_update_min_period(&min_clk_period, timings->tCLS_min, > + nfc_timings->setup_cycles); I am not sure I get the added value of this helper? >=20=20 > /* T2 <=3D> tCLH */ > - if (timings->tCLH_min > min_clk_period) > - min_clk_period =3D timings->tCLH_min; > + sunxi_nand_update_min_period(&min_clk_period, timings->tCLH_min, > + nfc_timings->setup_cycles); >=20=20 ... >=20=20 > static const struct sunxi_nfc_caps sunxi_nfc_h616_caps =3D { > @@ -2641,6 +2664,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_h616_c= aps =3D { > .nuser_data_tab =3D ARRAY_SIZE(sunxi_user_data_len_h6), > .max_ecc_steps =3D 32, > .sram_size =3D 8192, > + .timings =3D &sun50i_h6_nfc_timings, And this should be the last change in your series. BTW would it be relevant to align the various names ? (h6 timings in the h616 structure). Thanks, Miqu=C3=A8l From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E609C4451C for ; Fri, 17 Jul 2026 11:55:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gO52f3SmYF/nve9sGW5byTbqYX1Vw42JmPeDvq6xInE=; b=J5ab1DR7LA5cxS qwTNNeeeCcQ9H4mTOhnwzC/lrTCMzS0ABV3kcckByXTk2dK2L/s8ks97ZL4EKINTXPaXvNvMhbgpl 0czldhw+L6JLwsZaSAOQ4YlR3MZgI/9M4dD4BKafY8mGvyi4mu2bd75hqhBR9LpG4uxgDTkWjvjGN 9UZq8aU4i7cqaJ2Lm/UbMPxkNp++S3g+xYgQ8eGMSTr2TX/Zd/hITEV8J7M649tftfEy8HEruswhT 2NUfq1NxkvZhpNpCfV+6E771sfZJD4JaXkHuJE+gq0OS9aWZzE38ytXgFDBoJMnApkIPIHE5ImvFg 8QO5zImOnt7o3x9+2LQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wkhAL-00000002CMq-24Wn; Fri, 17 Jul 2026 11:55:41 +0000 Received: from smtpout-04.galae.net ([185.171.202.116]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wkhAH-00000002CLu-2XQC; Fri, 17 Jul 2026 11:55:39 +0000 Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 9A8E5C2B9F9; Fri, 17 Jul 2026 11:55:51 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B542860361; Fri, 17 Jul 2026 11:55:33 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D107811BD013E; Fri, 17 Jul 2026 13:55:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1784289332; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=olb07j+R4KRuYDDsVWwKXD1OEB5dTfTfM1jnrVire4o=; b=yXXP7Pval4WDA/Rcwb+NuWA918Ql9SeQC53coAvcqFKI2q+nVCeCIPdGvZXsQK/cgmJwXu rxnEETip2qaGBb3miTiLJf4GlRcxIEarrHbRcUe6Wg7JqOuvahWSb/9V5GpX/fUkgky0Mj v49VDKAKy5ybZzFxAZTCgNTpj0kSz60ad2VmLEmVRMo+bN2pNuwl2RVKyLZ6QNfW9t3ZB7 OqAOjpLEkOCC+pE1qDa4MSZbEtOzaYyUutJQVVflfgOtkrDedwXov4HTmK70CLjiXbDRH7 llX5muQWl4ULLMzwqT/e0OaHceTR2WyHA2sd9kosxCUBYJi04OTD724YsF0LEQ== From: Miquel Raynal To: James Hilliard Cc: linux-mtd@lists.infradead.org, linux-sunxi@lists.linux.dev, Richard Weinberger , Vignesh Raghavendra , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Richard Genoud , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] mtd: rawnand: sunxi: fix H6/H616 controller timings In-Reply-To: <20260715013142.640977-1-james.hilliard1@gmail.com> (James Hilliard's message of "Tue, 14 Jul 2026 19:31:38 -0600") References: <20260715013142.640977-1-james.hilliard1@gmail.com> User-Agent: mu4e 1.12.7; emacs 30.2 Date: Fri, 17 Jul 2026 13:55:29 +0200 Message-ID: <87a4rpkez2.fsf@bootlin.com> MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260717_045537_816024_330FC8D9 X-CRM114-Status: GOOD ( 15.82 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org SGVsbG8gSmFtZXMsCgpPbiAxNC8wNy8yMDI2IGF0IDE5OjMxOjM4IC0wNiwgSmFtZXMgSGlsbGlh cmQgPGphbWVzLmhpbGxpYXJkMUBnbWFpbC5jb20+IHdyb3RlOgoKPiBUaGUgTkFORCB0aW1pbmcg Y2FsY3VsYXRpb24gd2FzIHdyaXR0ZW4gZm9yIHRoZSBvcmlnaW5hbCBBMTAgTkRGQy4gSXQKPiBh c3N1bWVzIGNvbW1hbmQgYW5kIGFkZHJlc3Mgc2V0dXAgYW5kIGhvbGQgaW50ZXJ2YWxzIFQxLVQ0 LCBUNyBhbmQgVDExCj4gYXJlIG9uZSBjb250cm9sbGVyIGNsb2NrIGFuZCB1c2VzIHRoZSBBMTAg dGltaW5nLXJlZ2lzdGVyIGVuY29kaW5ncy4KPgo+IFRoZSBINi9INjE2IE5ERkMgaW5zdGVhZCBk ZWZpbmVzIHRob3NlIGludGVydmFscyBhcyB0d28gaW50ZXJuYWwgY2xvY2sKPiBjeWNsZXMgYW5k IHVzZXMgZGlmZmVyZW50IGVuY29kaW5ncyBmb3IgdFdCLCB0QURMLCB0V0hSIGFuZCB0UkhXLCBh cwo+IGRvY3VtZW50ZWQgaW4gdGhlIEg2MTYgVXNlciBNYW51YWwuCj4KPiBEZXNjcmliZSB0aGUg dGltaW5nIGNoYXJhY3RlcmlzdGljcyBpbiB0aGUgY29udHJvbGxlciBjYXBhYmlsaXR5IGRhdGEK PiBzbyB0aGUgY2xvY2sgc29sdmVyIGNhbiBzZWxlY3QgYSByYXRlIHBlcm1pdHRlZCBieSB0aGUg TkFORCBTRFIgdGltaW5ncwo+IGFuZCBwcm9ncmFtIHZhbGlkIGRlbGF5IGZpZWxkcy4gS2VlcCB0 aGUgbGVnYWN5IEExMCBiZWhhdmlvciB1bmNoYW5nZWQuCj4KPiBGaXhlczogODhmZDRlNGRlYWU4 ICgibXRkOiByYXduYW5kOiBzdW54aTogQWRkIHN1cHBvcnQgZm9yIEg2MTYgbmFuZCBjb250cm9s bGVyIikKCkNjOiBzdGFibGUgbWlzc2luZyBoZXJlCgo+IFNpZ25lZC1vZmYtYnk6IEphbWVzIEhp bGxpYXJkIDxqYW1lcy5oaWxsaWFyZDFAZ21haWwuY29tPgoKLi4uCgo+IEBAIC0xNjY3LDE2ICsx NjgxLDM1IEBAIHN0YXRpYyBpbnQgc3VueGlfbmZjX2h3X2VjY193cml0ZV9vb2Ioc3RydWN0IG5h bmRfY2hpcCAqbmFuZCwgaW50IHBhZ2UpCj4gIAlyZXR1cm4gbmFuZF9wcm9nX3BhZ2VfZW5kX29w KG5hbmQpOwo+ICB9Cj4gIAo+IC1zdGF0aWMgY29uc3QgczMyIHRXQl9sdXRbXSA9IHs2LCAxMiwg MTYsIDIwfTsKPiAtc3RhdGljIGNvbnN0IHMzMiB0UkhXX2x1dFtdID0gezQsIDgsIDEyLCAyMH07 Cj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3Qgc3VueGlfbmZjX3RpbWluZ3Mgc3VuNGlfYTEwX25mY190 aW1pbmdzID0gewo+ICsJLnNldHVwX2N5Y2xlcyA9IDEsCj4gKwkudFdCID0geyA2LCAxMiwgMTYs IDIwIH0sCj4gKwkudEFETCA9IHsgNywgMTUsIDIzLCAzMSB9LAo+ICsJLnRXSFIgPSB7IDcsIDE1 LCAyMywgMzEgfSwKPiArCS50UkhXID0geyA0LCA4LCAxMiwgMjAgfSwKPiArfTsKClRoaXMgcGF0 Y2ggbG9va3Mgb3ZlcmFsbCBjb3JyZWN0IGJ1dCBtdXN0IGJlIHNwbGl0LiBGb3IgaW5zdGFuY2Us IHRoZQpmYWN0IHRoYXQgeW91IGRyb3AgdGhlIExVVCBpbiBmYXZvdXIgb2YgeW91IG93biB0aW1p bmcgYXJyYXkgc2hhbGwgYmUKZG9uZSBpbiBhIHByZXBhcmF0aW9uIHBhdGNoLCB3aXRob3V0IGFk ZGluZyBuZXcgdGltaW5ncywgbm9yIGFkZGluZyB0aGUKbmV3IGNvbnRyb2xsZXIgdGltaW5ncy4K ClRoZW4gaW4gYSBzZWNvbmQgdGltZSB5b3UgY291bGQgYWRkIHRBREwgYW5kIHRXSFIgc3VwcG9y dCwgZXRjLgoKPiArCj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3Qgc3VueGlfbmZjX3RpbWluZ3Mgc3Vu NTBpX2g2X25mY190aW1pbmdzID0gewo+ICsJLnNldHVwX2N5Y2xlcyA9IDIsCj4gKwkudFdCID0g eyAyOCwgNDQsIDYwLCA3NiB9LAo+ICsJLnRBREwgPSB7IDAsIDEyLCAyOCwgNDQgfSwKPiArCS50 V0hSID0geyAwLCAxMiwgMjgsIDQ0IH0sCj4gKwkudFJIVyA9IHsgOCwgMjQsIDQwLCA1NiB9LAo+ ICt9Owo+ICsKPiArc3RhdGljIHZvaWQgc3VueGlfbmFuZF91cGRhdGVfbWluX3BlcmlvZCh1MzIg Km1pbl9wZXJpb2QsIHUzMiBkdXJhdGlvbiwKPiArCQkJCQkgdW5zaWduZWQgaW50IGN5Y2xlcykK PiArewo+ICsJKm1pbl9wZXJpb2QgPSBtYXgoKm1pbl9wZXJpb2QsIERJVl9ST1VORF9VUChkdXJh dGlvbiwgY3ljbGVzKSk7Cj4gK30KPiAgCj4gLXN0YXRpYyBpbnQgX3N1bnhpX25hbmRfbG9va3Vw X3RpbWluZyhjb25zdCBzMzIgKmx1dCwgaW50IGx1dF9zaXplLCB1MzIgZHVyYXRpb24sCj4gLQkJ dTMyIGNsa19wZXJpb2QpCj4gK3N0YXRpYyBpbnQgc3VueGlfbmFuZF9sb29rdXBfdGltaW5nKGNv bnN0IHU4ICpsdXQsIHUzMiBkdXJhdGlvbiwKPiArCQkJCSAgICB1MzIgY2xrX3BlcmlvZCkKClRo aXMgY2hhbmdlIGlzIGZpbmUgYnV0IGxpa2VseSBhbHNvIHVucmVsYXRlZCBhbmQgc2hvdWxkICht YXliZSkgYmUgbW92ZWQgaW4gaXRzCm93biBjb21taXQuCgo+ICB7Cj4gIAl1MzIgY2xrX2N5Y2xl cyA9IERJVl9ST1VORF9VUChkdXJhdGlvbiwgY2xrX3BlcmlvZCk7Cj4gIAlpbnQgaTsKPiAgCj4g LQlmb3IgKGkgPSAwOyBpIDwgbHV0X3NpemU7IGkrKykgewo+ICsJZm9yIChpID0gMDsgaSA8IFNV TlhJX05GQ19USU1JTkdfU1RFUFM7IGkrKykgewo+ICAJCWlmIChjbGtfY3ljbGVzIDw9IGx1dFtp XSkKPiAgCQkJcmV0dXJuIGk7Cj4gIAl9CgouLi4KCj4gQEAgLTE3MDMsNzcgKzE3MzQsNjUgQEAg c3RhdGljIGludCBzdW54aV9uZmNfc2V0dXBfaW50ZXJmYWNlKHN0cnVjdCBuYW5kX2NoaXAgKm5h bmQsIGludCBjc2xpbmUsCj4gIAkJcmV0dXJuIC1FTk9UU1VQUDsKPiAgCj4gIAkvKiBUMSA8PT4g dENMUyAqLwo+IC0JaWYgKHRpbWluZ3MtPnRDTFNfbWluID4gbWluX2Nsa19wZXJpb2QpCj4gLQkJ bWluX2Nsa19wZXJpb2QgPSB0aW1pbmdzLT50Q0xTX21pbjsKPiArCXN1bnhpX25hbmRfdXBkYXRl X21pbl9wZXJpb2QoJm1pbl9jbGtfcGVyaW9kLCB0aW1pbmdzLT50Q0xTX21pbiwKPiArCQkJCSAg ICAgbmZjX3RpbWluZ3MtPnNldHVwX2N5Y2xlcyk7CgpJIGFtIG5vdCBzdXJlIEkgZ2V0IHRoZSBh ZGRlZCB2YWx1ZSBvZiB0aGlzIGhlbHBlcj8KCj4gIAo+ICAJLyogVDIgPD0+IHRDTEggKi8KPiAt CWlmICh0aW1pbmdzLT50Q0xIX21pbiA+IG1pbl9jbGtfcGVyaW9kKQo+IC0JCW1pbl9jbGtfcGVy aW9kID0gdGltaW5ncy0+dENMSF9taW47Cj4gKwlzdW54aV9uYW5kX3VwZGF0ZV9taW5fcGVyaW9k KCZtaW5fY2xrX3BlcmlvZCwgdGltaW5ncy0+dENMSF9taW4sCj4gKwkJCQkgICAgIG5mY190aW1p bmdzLT5zZXR1cF9jeWNsZXMpOwo+ICAKCi4uLgoKPiAgCj4gIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg c3VueGlfbmZjX2NhcHMgc3VueGlfbmZjX2g2MTZfY2FwcyA9IHsKPiBAQCAtMjY0MSw2ICsyNjY0 LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBzdW54aV9uZmNfY2FwcyBzdW54aV9uZmNfaDYxNl9j YXBzID0gewo+ICAJLm51c2VyX2RhdGFfdGFiID0gQVJSQVlfU0laRShzdW54aV91c2VyX2RhdGFf bGVuX2g2KSwKPiAgCS5tYXhfZWNjX3N0ZXBzID0gMzIsCj4gIAkuc3JhbV9zaXplID0gODE5MiwK PiArCS50aW1pbmdzID0gJnN1bjUwaV9oNl9uZmNfdGltaW5ncywKCkFuZCB0aGlzIHNob3VsZCBi ZSB0aGUgbGFzdCBjaGFuZ2UgaW4geW91ciBzZXJpZXMuCgpCVFcgd291bGQgaXQgYmUgcmVsZXZh bnQgdG8gYWxpZ24gdGhlIHZhcmlvdXMgbmFtZXMgPyAoaDYgdGltaW5ncyBpbiB0aGUKaDYxNiBz dHJ1Y3R1cmUpLgoKVGhhbmtzLApNaXF1w6hsCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KTGludXggTVREIGRpc2N1c3Npb24gbWFpbGluZyBs aXN0Cmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtbXRk Lwo=