From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BB75C02180 for ; Wed, 15 Jan 2025 19:19:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qo6bDa44J7qkMqp2qCJfflbdIlDU2YDgm4Qi1WRfAP4=; b=uSCYOzQqg22vsh GN++GD15i9Rzdtgy/l1MHPhafMs93Piz6k2nMOSnb6qH9XEGxeFW1m9KgxZM1HtCo507420C9zid2 WLioe8la38ZfnJgBduM6rIKx5AJznbK+wJOIZfI1YgbuQ9ww8JrxsCEoq7DyUESTr9/TEu+/Z9Wye jpRA6yacBJ6Z6Udj1FZCxtDc3Mpxu7ME7KmH/6ZGAd3vaFC5hk+e/SDx1Sx5umxPGI7ZkQJKhqumo zhwqd6vwH0hs6Xs97tBSlTARE5b4ewIf3wG/WGEmWDpEYU8khQR8K4ofQzYBCQOTIe7m9CL3kVHs6 62Grcedne3WaHg01kWUQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tY8vh-0000000Ct1p-3bEC; Wed, 15 Jan 2025 19:19:53 +0000 Received: from relay9-d.mail.gandi.net ([2001:4b98:dc4:8::229]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tY8vf-0000000Ct1U-2lKt for linux-mtd@lists.infradead.org; Wed, 15 Jan 2025 19:19:52 +0000 Received: by mail.gandi.net (Postfix) with ESMTPSA id 90337FF803; Wed, 15 Jan 2025 19:19:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1736968788; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nGxe68+OYiU88VLdXsC3OZx40ILWPbVyn8LgJMnizvg=; b=gwtULTIVh9tFF1/u95Lxx1mYXOXMX7fbXsGrAqQHstSmM8Qx37kxdry6ofss07cai7xD2q Ny+Hfy42BfOA0wKGUZJzGxuKIi/BWadHD7w8oMUyq47oBCJy7jUZ+5TdPav7haYhocxAf0 1MJppOGs7Zx1H3MyJr3xxBtXIp9lTpUaHB+GIcjGLErFCgzya3rOfUd4secCBvIupGmP6J SDdJ2fYczHTpslsn5/25XH+4Z+fWXsde316XrRPeMfCDOVVRD+bBAvl+ZcAGrnc6ZOSD3n GqS9GhV0BmfEfwpyqQIP1KrFwNoagKGLlFRAHupQBkN60vaD2W/mEqxgAOm3/A== From: Miquel Raynal To: Santhosh Kumar K Cc: , , , , , , Subject: Re: [PATCH 1/3] mtd: spinand: Define OctalIO ops In-Reply-To: <20250102115110.1402440-2-s-k6@ti.com> (Santhosh Kumar K.'s message of "Thu, 2 Jan 2025 17:21:08 +0530") References: <20250102115110.1402440-1-s-k6@ti.com> <20250102115110.1402440-2-s-k6@ti.com> User-Agent: mu4e 1.12.7; emacs 29.4 Date: Wed, 15 Jan 2025 20:19:48 +0100 Message-ID: <87a5brlwa3.fsf@bootlin.com> MIME-Version: 1.0 X-GND-Sasl: miquel.raynal@bootlin.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250115_111951_836826_13B08496 X-CRM114-Status: UNSURE ( 8.05 ) X-CRM114-Notice: Please train this message. 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emacs 29.4 Date: Wed, 15 Jan 2025 20:19:48 +0100 Message-ID: <87a5brlwa3.fsf@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: miquel.raynal@bootlin.com Hello Santhosh, On 02/01/2025 at 17:21:08 +0530, Santhosh Kumar K wrote: > Define the macros for Octal-based read and load operations on OSPI > NAND flashes. Following a recent discussion with the SPI-NOR maintainers, I plan on renaming some of these macros to make them more clear regarding what they do. There are many ways to do octal transfers (data only, address and data, all cycles, sdr vs dtr...) and we want to clarify that. Also, I believe there are frequency limitations which are not correctly declared and possibly some issues with the dummy cycles which need to be clarified, especially in the Winbond driver. I plan on working on this in the next weeks, once my head is clear about the specificities with these chips. I will add you in Cc. Cheers, Miqu=C3=A8l