From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Extract _intel_{enable, disable}_shared_dpll()
Date: Thu, 12 Oct 2023 17:57:27 +0300 [thread overview]
Message-ID: <87a5sn28iw.fsf@intel.com> (raw)
In-Reply-To: <20231012123522.26045-5-ville.syrjala@linux.intel.com>
On Thu, 12 Oct 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We have a bit of duplicated code around the DPLL disabling. Extact
*extract
> that to new function, and for symmetry also do the same for the
> enable direction.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 37 ++++++++++++-------
> 1 file changed, 23 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 556b10eefe66..7958d0bd851e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -219,6 +219,26 @@ intel_tc_pll_enable_reg(struct drm_i915_private *i915,
> return MG_PLL_ENABLE(tc_port);
> }
>
> +static void _intel_enable_shared_dpll(struct drm_i915_private *i915,
> + struct intel_shared_dpll *pll)
> +{
> + if (pll->info->power_domain)
> + pll->wakeref = intel_display_power_get(i915, pll->info->power_domain);
> +
> + pll->info->funcs->enable(i915, pll);
> + pll->on = true;
> +}
> +
> +static void _intel_disable_shared_dpll(struct drm_i915_private *i915,
> + struct intel_shared_dpll *pll)
> +{
> + pll->info->funcs->disable(i915, pll);
> + pll->on = false;
> +
> + if (pll->info->power_domain)
> + intel_display_power_put(i915, pll->info->power_domain, pll->wakeref);
> +}
> +
> /**
> * intel_enable_shared_dpll - enable a CRTC's shared DPLL
> * @crtc_state: CRTC, and its state, which has a shared DPLL
> @@ -259,11 +279,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
>
> drm_dbg_kms(&i915->drm, "enabling %s\n", pll->info->name);
>
> - if (pll->info->power_domain)
> - pll->wakeref = intel_display_power_get(i915, pll->info->power_domain);
> -
> - pll->info->funcs->enable(i915, pll);
> - pll->on = true;
> + _intel_enable_shared_dpll(i915, pll);
>
> out:
> mutex_unlock(&i915->display.dpll.lock);
> @@ -308,11 +324,8 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
> goto out;
>
> drm_dbg_kms(&i915->drm, "disabling %s\n", pll->info->name);
> - pll->info->funcs->disable(i915, pll);
> - pll->on = false;
>
> - if (pll->info->power_domain)
> - intel_display_power_put(i915, pll->info->power_domain, pll->wakeref);
> + _intel_disable_shared_dpll(i915, pll);
>
> out:
> mutex_unlock(&i915->display.dpll.lock);
> @@ -4408,11 +4421,7 @@ static void sanitize_dpll_state(struct drm_i915_private *i915,
> "%s enabled but not in use, disabling\n",
> pll->info->name);
>
> - pll->info->funcs->disable(i915, pll);
> - pll->on = false;
> -
> - if (pll->info->power_domain)
> - intel_display_power_put(i915, pll->info->power_domain, pll->wakeref);
> + _intel_disable_shared_dpll(i915, pll);
> }
>
> void intel_dpll_sanitize_state(struct drm_i915_private *i915)
--
Jani Nikula, Intel
next prev parent reply other threads:[~2023-10-12 14:57 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-12 12:35 [Intel-gfx] [PATCH 0/4] drm/i915: DPLL code cleanups Ville Syrjala
2023-10-12 12:35 ` [Intel-gfx] [PATCH 1/4] drm/i915: Use named initializers for DPLL info Ville Syrjala
2023-10-12 14:52 ` Jani Nikula
2023-10-12 12:35 ` [Intel-gfx] [PATCH 2/4] drm/i915: Abstract the extra JSL/EHL DPLL4 power domain better Ville Syrjala
2023-10-12 14:56 ` Jani Nikula
2023-10-12 16:20 ` Imre Deak
2023-10-12 12:35 ` [Intel-gfx] [PATCH 3/4] drm/i915: Move the DPLL extra power domain handling up one level Ville Syrjala
2023-10-12 14:56 ` Jani Nikula
2023-10-12 12:35 ` [Intel-gfx] [PATCH 4/4] drm/i915: Extract _intel_{enable, disable}_shared_dpll() Ville Syrjala
2023-10-12 14:57 ` Jani Nikula [this message]
2023-10-12 18:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: DPLL code cleanups Patchwork
2023-10-12 18:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-13 22:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: DPLL code cleanups (rev2) Patchwork
2023-10-13 23:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-17 16:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: DPLL code cleanups (rev4) Patchwork
2023-10-17 16:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-27 22:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: DPLL code cleanups (rev5) Patchwork
2023-10-27 22:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-30 7:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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