From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: kvm@vger.kernel.org, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Peter Shier <pshier@google.com>,
linux-kernel@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 6/9] Docs: KVM: Add doc for the bitmap firmware registers
Date: Tue, 03 May 2022 18:14:06 +0100 [thread overview]
Message-ID: <87a6by8roh.wl-maz@kernel.org> (raw)
In-Reply-To: <20220502233853.1233742-7-rananta@google.com>
On Tue, 03 May 2022 00:38:50 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> Add the documentation for the bitmap firmware registers in
> hypercalls.rst and api.rst. This includes the details for
> KVM_REG_ARM_STD_BMAP, KVM_REG_ARM_STD_HYP_BMAP, and
> KVM_REG_ARM_VENDOR_HYP_BMAP registers.
>
> Since the document is growing to carry other hypercall related
> information, make necessary adjustments to present the document
> in a generic sense, rather than being PSCI focused.
>
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> ---
> Documentation/virt/kvm/api.rst | 16 ++++
> Documentation/virt/kvm/arm/hypercalls.rst | 94 ++++++++++++++++++-----
> 2 files changed, 92 insertions(+), 18 deletions(-)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index 4a900cdbc62e..8ae638be79fd 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -2542,6 +2542,22 @@ arm64 firmware pseudo-registers have the following bit pattern::
>
> 0x6030 0000 0014 <regno:16>
>
> +arm64 bitmap feature firmware pseudo-registers have the following bit pattern::
> +
> + 0x6030 0000 0016 <regno:16>
> +
> +The bitmap feature firmware registers exposes the hypercall services that are
> +available for userspace to configure. The set bits corresponds to the services
> +that are available for the guests to access. By default, KVM sets all the
> +supported bits during VM initialization. The userspace can discover the
> +available services via KVM_GET_ONE_REG, and write back the bitmap corresponding
> +to the features that it wishes guests to see via KVM_SET_ONE_REG.
> +
> +Note: These registers are immutable once any of the vCPUs of the VM has run at
> +least once. A KVM_SET_ONE_REG in such a scenario will return a -EBUSY to userspace.
> +
The placement is odd, as SVE uses ID 0x0015, and is *after* this.
> +(See Documentation/virt/kvm/arm/hypercalls.rst for more details.)
> +
> arm64 SVE registers have the following bit patterns::
>
> 0x6080 0000 0015 00 <n:5> <slice:5> Zn bits[2048*slice + 2047 : 2048*slice]
> diff --git a/Documentation/virt/kvm/arm/hypercalls.rst b/Documentation/virt/kvm/arm/hypercalls.rst
> index d52c2e83b5b8..383ca766cf36 100644
> --- a/Documentation/virt/kvm/arm/hypercalls.rst
> +++ b/Documentation/virt/kvm/arm/hypercalls.rst
> @@ -1,32 +1,32 @@
> .. SPDX-License-Identifier: GPL-2.0
>
> -=========================================
> -Power State Coordination Interface (PSCI)
> -=========================================
> +=======================
> +ARM Hypercall Interface
> +=======================
>
> -KVM implements the PSCI (Power State Coordination Interface)
> -specification in order to provide services such as CPU on/off, reset
> -and power-off to the guest.
> +KVM handles the hypercall services as requested by the guests. New hypercall
> +services are regularly made available by the ARM specification or by KVM (as
> +vendor services) if they make sense from a virtualization point of view.
>
> -The PSCI specification is regularly updated to provide new features,
> -and KVM implements these updates if they make sense from a virtualization
> -point of view.
> -
> -This means that a guest booted on two different versions of KVM can
> -observe two different "firmware" revisions. This could cause issues if
> -a given guest is tied to a particular PSCI revision (unlikely), or if
> -a migration causes a different PSCI version to be exposed out of the
> -blue to an unsuspecting guest.
> +This means that a guest booted on two different versions of KVM can observe
> +two different "firmware" revisions. This could cause issues if a given guest
> +is tied to a particular version of a hypercall service, or if a migration
> +causes a different version to be exposed out of the blue to an unsuspecting
> +guest.
>
> In order to remedy this situation, KVM exposes a set of "firmware
> pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
> interface. These registers can be saved/restored by userspace, and set
> -to a convenient value if required.
> +to a convenient value as required.
>
> -The following register is defined:
> +The following registers are defined:
>
> * KVM_REG_ARM_PSCI_VERSION:
>
> + KVM implements the PSCI (Power State Coordination Interface)
> + specification in order to provide services such as CPU on/off, reset
> + and power-off to the guest.
> +
> - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
> (and thus has already been initialized)
> - Returns the current PSCI version on GET_ONE_REG (defaulting to the
> @@ -74,4 +74,62 @@ The following register is defined:
> KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
> The workaround is always active on this vCPU or it is not needed.
>
> -.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
> +
> +Bitmap Feature Firmware Registers
> +---------------------------------
> +
> +Contrary to the above registers, the following registers exposes the hypercall
> +services in the form of a feature-bitmap to the userspace. This bitmap is
> +translated to the services that are available to the guest. There is a register
> +defined per service call owner and can be accessed via GET/SET_ONE_REG interface.
> +
> +By default, these registers are set with the upper limit of the features that
> +are supported. This way userspace can discover all the electable hypercall services
> +via GET_ONE_REG. The user-space can write-back the desired bitmap back via
> +SET_ONE_REG. The features for the registers that are untouched, probably because
> +userspace isn't aware of them, will be exposed as is to the guest.
> +
> +Note that KVM would't allow the userspace to configure the registers anymore once
> +any of the vCPUs has run at least once. Instead, it will return a -EBUSY.
> +
Formatting is a bit off. We try to stay within the 80 cols format for
text documents such as this.
> +The psuedo-firmware bitmap register are as follows:
Typo.
> +
> +* KVM_REG_ARM_STD_BMAP:
> + Controls the bitmap of the ARM Standard Secure Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_STD_BIT_TRNG_V1_0:
> + The bit represents the services offered under v1.0 of ARM True Random
> + Number Generator (TRNG) specification, ARM DEN0098.
> +
> +* KVM_REG_ARM_STD_HYP_BMAP:
> + Controls the bitmap of the ARM Standard Hypervisor Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_STD_HYP_BIT_PV_TIME:
> + The bit represents the Paravirtualized Time service as represented by
> + ARM DEN0057A.
> +
> +* KVM_REG_ARM_VENDOR_HYP_BMAP:
> + Controls the bitmap of the Vendor specific Hypervisor Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT
> + The bit represents the ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID
> + and ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID function-ids.
> +
> + Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
> + The bit represents the Precision Time Protocol KVM service.
> +
> +Errors:
> +
> + ======= =============================================================
> + -ENOENT Unknown register accessed.
> + -EBUSY Attempt a 'write' to the register after the VM has started.
> + -EINVAL Invalid bitmap written to the register.
> + ======= =============================================================
> +
> +.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
> \ No newline at end of file
> --
> 2.36.0.464.gb9c8b46e94-goog
>
>
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Andrew Jones <drjones@redhat.com>,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Peter Shier <pshier@google.com>,
Ricardo Koller <ricarkol@google.com>,
Oliver Upton <oupton@google.com>,
Reiji Watanabe <reijiw@google.com>,
Jing Zhang <jingzhangos@google.com>,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, Gavin Shan <gshan@redhat.com>
Subject: Re: [PATCH v7 6/9] Docs: KVM: Add doc for the bitmap firmware registers
Date: Tue, 03 May 2022 18:14:06 +0100 [thread overview]
Message-ID: <87a6by8roh.wl-maz@kernel.org> (raw)
In-Reply-To: <20220502233853.1233742-7-rananta@google.com>
On Tue, 03 May 2022 00:38:50 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> Add the documentation for the bitmap firmware registers in
> hypercalls.rst and api.rst. This includes the details for
> KVM_REG_ARM_STD_BMAP, KVM_REG_ARM_STD_HYP_BMAP, and
> KVM_REG_ARM_VENDOR_HYP_BMAP registers.
>
> Since the document is growing to carry other hypercall related
> information, make necessary adjustments to present the document
> in a generic sense, rather than being PSCI focused.
>
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> ---
> Documentation/virt/kvm/api.rst | 16 ++++
> Documentation/virt/kvm/arm/hypercalls.rst | 94 ++++++++++++++++++-----
> 2 files changed, 92 insertions(+), 18 deletions(-)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index 4a900cdbc62e..8ae638be79fd 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -2542,6 +2542,22 @@ arm64 firmware pseudo-registers have the following bit pattern::
>
> 0x6030 0000 0014 <regno:16>
>
> +arm64 bitmap feature firmware pseudo-registers have the following bit pattern::
> +
> + 0x6030 0000 0016 <regno:16>
> +
> +The bitmap feature firmware registers exposes the hypercall services that are
> +available for userspace to configure. The set bits corresponds to the services
> +that are available for the guests to access. By default, KVM sets all the
> +supported bits during VM initialization. The userspace can discover the
> +available services via KVM_GET_ONE_REG, and write back the bitmap corresponding
> +to the features that it wishes guests to see via KVM_SET_ONE_REG.
> +
> +Note: These registers are immutable once any of the vCPUs of the VM has run at
> +least once. A KVM_SET_ONE_REG in such a scenario will return a -EBUSY to userspace.
> +
The placement is odd, as SVE uses ID 0x0015, and is *after* this.
> +(See Documentation/virt/kvm/arm/hypercalls.rst for more details.)
> +
> arm64 SVE registers have the following bit patterns::
>
> 0x6080 0000 0015 00 <n:5> <slice:5> Zn bits[2048*slice + 2047 : 2048*slice]
> diff --git a/Documentation/virt/kvm/arm/hypercalls.rst b/Documentation/virt/kvm/arm/hypercalls.rst
> index d52c2e83b5b8..383ca766cf36 100644
> --- a/Documentation/virt/kvm/arm/hypercalls.rst
> +++ b/Documentation/virt/kvm/arm/hypercalls.rst
> @@ -1,32 +1,32 @@
> .. SPDX-License-Identifier: GPL-2.0
>
> -=========================================
> -Power State Coordination Interface (PSCI)
> -=========================================
> +=======================
> +ARM Hypercall Interface
> +=======================
>
> -KVM implements the PSCI (Power State Coordination Interface)
> -specification in order to provide services such as CPU on/off, reset
> -and power-off to the guest.
> +KVM handles the hypercall services as requested by the guests. New hypercall
> +services are regularly made available by the ARM specification or by KVM (as
> +vendor services) if they make sense from a virtualization point of view.
>
> -The PSCI specification is regularly updated to provide new features,
> -and KVM implements these updates if they make sense from a virtualization
> -point of view.
> -
> -This means that a guest booted on two different versions of KVM can
> -observe two different "firmware" revisions. This could cause issues if
> -a given guest is tied to a particular PSCI revision (unlikely), or if
> -a migration causes a different PSCI version to be exposed out of the
> -blue to an unsuspecting guest.
> +This means that a guest booted on two different versions of KVM can observe
> +two different "firmware" revisions. This could cause issues if a given guest
> +is tied to a particular version of a hypercall service, or if a migration
> +causes a different version to be exposed out of the blue to an unsuspecting
> +guest.
>
> In order to remedy this situation, KVM exposes a set of "firmware
> pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
> interface. These registers can be saved/restored by userspace, and set
> -to a convenient value if required.
> +to a convenient value as required.
>
> -The following register is defined:
> +The following registers are defined:
>
> * KVM_REG_ARM_PSCI_VERSION:
>
> + KVM implements the PSCI (Power State Coordination Interface)
> + specification in order to provide services such as CPU on/off, reset
> + and power-off to the guest.
> +
> - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
> (and thus has already been initialized)
> - Returns the current PSCI version on GET_ONE_REG (defaulting to the
> @@ -74,4 +74,62 @@ The following register is defined:
> KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
> The workaround is always active on this vCPU or it is not needed.
>
> -.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
> +
> +Bitmap Feature Firmware Registers
> +---------------------------------
> +
> +Contrary to the above registers, the following registers exposes the hypercall
> +services in the form of a feature-bitmap to the userspace. This bitmap is
> +translated to the services that are available to the guest. There is a register
> +defined per service call owner and can be accessed via GET/SET_ONE_REG interface.
> +
> +By default, these registers are set with the upper limit of the features that
> +are supported. This way userspace can discover all the electable hypercall services
> +via GET_ONE_REG. The user-space can write-back the desired bitmap back via
> +SET_ONE_REG. The features for the registers that are untouched, probably because
> +userspace isn't aware of them, will be exposed as is to the guest.
> +
> +Note that KVM would't allow the userspace to configure the registers anymore once
> +any of the vCPUs has run at least once. Instead, it will return a -EBUSY.
> +
Formatting is a bit off. We try to stay within the 80 cols format for
text documents such as this.
> +The psuedo-firmware bitmap register are as follows:
Typo.
> +
> +* KVM_REG_ARM_STD_BMAP:
> + Controls the bitmap of the ARM Standard Secure Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_STD_BIT_TRNG_V1_0:
> + The bit represents the services offered under v1.0 of ARM True Random
> + Number Generator (TRNG) specification, ARM DEN0098.
> +
> +* KVM_REG_ARM_STD_HYP_BMAP:
> + Controls the bitmap of the ARM Standard Hypervisor Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_STD_HYP_BIT_PV_TIME:
> + The bit represents the Paravirtualized Time service as represented by
> + ARM DEN0057A.
> +
> +* KVM_REG_ARM_VENDOR_HYP_BMAP:
> + Controls the bitmap of the Vendor specific Hypervisor Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT
> + The bit represents the ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID
> + and ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID function-ids.
> +
> + Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
> + The bit represents the Precision Time Protocol KVM service.
> +
> +Errors:
> +
> + ======= =============================================================
> + -ENOENT Unknown register accessed.
> + -EBUSY Attempt a 'write' to the register after the VM has started.
> + -EINVAL Invalid bitmap written to the register.
> + ======= =============================================================
> +
> +.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
> \ No newline at end of file
> --
> 2.36.0.464.gb9c8b46e94-goog
>
>
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Andrew Jones <drjones@redhat.com>,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Peter Shier <pshier@google.com>,
Ricardo Koller <ricarkol@google.com>,
Oliver Upton <oupton@google.com>,
Reiji Watanabe <reijiw@google.com>,
Jing Zhang <jingzhangos@google.com>,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, Gavin Shan <gshan@redhat.com>
Subject: Re: [PATCH v7 6/9] Docs: KVM: Add doc for the bitmap firmware registers
Date: Tue, 03 May 2022 18:14:06 +0100 [thread overview]
Message-ID: <87a6by8roh.wl-maz@kernel.org> (raw)
In-Reply-To: <20220502233853.1233742-7-rananta@google.com>
On Tue, 03 May 2022 00:38:50 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> Add the documentation for the bitmap firmware registers in
> hypercalls.rst and api.rst. This includes the details for
> KVM_REG_ARM_STD_BMAP, KVM_REG_ARM_STD_HYP_BMAP, and
> KVM_REG_ARM_VENDOR_HYP_BMAP registers.
>
> Since the document is growing to carry other hypercall related
> information, make necessary adjustments to present the document
> in a generic sense, rather than being PSCI focused.
>
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> ---
> Documentation/virt/kvm/api.rst | 16 ++++
> Documentation/virt/kvm/arm/hypercalls.rst | 94 ++++++++++++++++++-----
> 2 files changed, 92 insertions(+), 18 deletions(-)
>
> diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
> index 4a900cdbc62e..8ae638be79fd 100644
> --- a/Documentation/virt/kvm/api.rst
> +++ b/Documentation/virt/kvm/api.rst
> @@ -2542,6 +2542,22 @@ arm64 firmware pseudo-registers have the following bit pattern::
>
> 0x6030 0000 0014 <regno:16>
>
> +arm64 bitmap feature firmware pseudo-registers have the following bit pattern::
> +
> + 0x6030 0000 0016 <regno:16>
> +
> +The bitmap feature firmware registers exposes the hypercall services that are
> +available for userspace to configure. The set bits corresponds to the services
> +that are available for the guests to access. By default, KVM sets all the
> +supported bits during VM initialization. The userspace can discover the
> +available services via KVM_GET_ONE_REG, and write back the bitmap corresponding
> +to the features that it wishes guests to see via KVM_SET_ONE_REG.
> +
> +Note: These registers are immutable once any of the vCPUs of the VM has run at
> +least once. A KVM_SET_ONE_REG in such a scenario will return a -EBUSY to userspace.
> +
The placement is odd, as SVE uses ID 0x0015, and is *after* this.
> +(See Documentation/virt/kvm/arm/hypercalls.rst for more details.)
> +
> arm64 SVE registers have the following bit patterns::
>
> 0x6080 0000 0015 00 <n:5> <slice:5> Zn bits[2048*slice + 2047 : 2048*slice]
> diff --git a/Documentation/virt/kvm/arm/hypercalls.rst b/Documentation/virt/kvm/arm/hypercalls.rst
> index d52c2e83b5b8..383ca766cf36 100644
> --- a/Documentation/virt/kvm/arm/hypercalls.rst
> +++ b/Documentation/virt/kvm/arm/hypercalls.rst
> @@ -1,32 +1,32 @@
> .. SPDX-License-Identifier: GPL-2.0
>
> -=========================================
> -Power State Coordination Interface (PSCI)
> -=========================================
> +=======================
> +ARM Hypercall Interface
> +=======================
>
> -KVM implements the PSCI (Power State Coordination Interface)
> -specification in order to provide services such as CPU on/off, reset
> -and power-off to the guest.
> +KVM handles the hypercall services as requested by the guests. New hypercall
> +services are regularly made available by the ARM specification or by KVM (as
> +vendor services) if they make sense from a virtualization point of view.
>
> -The PSCI specification is regularly updated to provide new features,
> -and KVM implements these updates if they make sense from a virtualization
> -point of view.
> -
> -This means that a guest booted on two different versions of KVM can
> -observe two different "firmware" revisions. This could cause issues if
> -a given guest is tied to a particular PSCI revision (unlikely), or if
> -a migration causes a different PSCI version to be exposed out of the
> -blue to an unsuspecting guest.
> +This means that a guest booted on two different versions of KVM can observe
> +two different "firmware" revisions. This could cause issues if a given guest
> +is tied to a particular version of a hypercall service, or if a migration
> +causes a different version to be exposed out of the blue to an unsuspecting
> +guest.
>
> In order to remedy this situation, KVM exposes a set of "firmware
> pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
> interface. These registers can be saved/restored by userspace, and set
> -to a convenient value if required.
> +to a convenient value as required.
>
> -The following register is defined:
> +The following registers are defined:
>
> * KVM_REG_ARM_PSCI_VERSION:
>
> + KVM implements the PSCI (Power State Coordination Interface)
> + specification in order to provide services such as CPU on/off, reset
> + and power-off to the guest.
> +
> - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
> (and thus has already been initialized)
> - Returns the current PSCI version on GET_ONE_REG (defaulting to the
> @@ -74,4 +74,62 @@ The following register is defined:
> KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
> The workaround is always active on this vCPU or it is not needed.
>
> -.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
> +
> +Bitmap Feature Firmware Registers
> +---------------------------------
> +
> +Contrary to the above registers, the following registers exposes the hypercall
> +services in the form of a feature-bitmap to the userspace. This bitmap is
> +translated to the services that are available to the guest. There is a register
> +defined per service call owner and can be accessed via GET/SET_ONE_REG interface.
> +
> +By default, these registers are set with the upper limit of the features that
> +are supported. This way userspace can discover all the electable hypercall services
> +via GET_ONE_REG. The user-space can write-back the desired bitmap back via
> +SET_ONE_REG. The features for the registers that are untouched, probably because
> +userspace isn't aware of them, will be exposed as is to the guest.
> +
> +Note that KVM would't allow the userspace to configure the registers anymore once
> +any of the vCPUs has run at least once. Instead, it will return a -EBUSY.
> +
Formatting is a bit off. We try to stay within the 80 cols format for
text documents such as this.
> +The psuedo-firmware bitmap register are as follows:
Typo.
> +
> +* KVM_REG_ARM_STD_BMAP:
> + Controls the bitmap of the ARM Standard Secure Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_STD_BIT_TRNG_V1_0:
> + The bit represents the services offered under v1.0 of ARM True Random
> + Number Generator (TRNG) specification, ARM DEN0098.
> +
> +* KVM_REG_ARM_STD_HYP_BMAP:
> + Controls the bitmap of the ARM Standard Hypervisor Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_STD_HYP_BIT_PV_TIME:
> + The bit represents the Paravirtualized Time service as represented by
> + ARM DEN0057A.
> +
> +* KVM_REG_ARM_VENDOR_HYP_BMAP:
> + Controls the bitmap of the Vendor specific Hypervisor Service Calls.
> +
> + The following bits are accepted:
> +
> + Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT
> + The bit represents the ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID
> + and ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID function-ids.
> +
> + Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
> + The bit represents the Precision Time Protocol KVM service.
> +
> +Errors:
> +
> + ======= =============================================================
> + -ENOENT Unknown register accessed.
> + -EBUSY Attempt a 'write' to the register after the VM has started.
> + -EINVAL Invalid bitmap written to the register.
> + ======= =============================================================
> +
> +.. [1] https://developer.arm.com/-/media/developer/pdf/ARM_DEN_0070A_Firmware_interfaces_for_mitigating_CVE-2017-5715.pdf
> \ No newline at end of file
> --
> 2.36.0.464.gb9c8b46e94-goog
>
>
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2022-05-03 17:14 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-02 23:38 [PATCH v7 0/9] KVM: arm64: Add support for hypercall services selection Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` [PATCH v7 1/9] KVM: arm64: Factor out firmware register handling from psci.c Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-03 10:35 ` Marc Zyngier
2022-05-03 10:35 ` Marc Zyngier
2022-05-03 10:35 ` Marc Zyngier
2022-05-02 23:38 ` [PATCH v7 2/9] KVM: arm64: Setup a framework for hypercall bitmap firmware registers Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-03 13:28 ` Marc Zyngier
2022-05-03 13:28 ` Marc Zyngier
2022-05-03 13:28 ` Marc Zyngier
2022-05-02 23:38 ` [PATCH v7 3/9] KVM: arm64: Add standard hypervisor firmware register Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` [PATCH v7 4/9] KVM: arm64: Add vendor " Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` [PATCH v7 5/9] Docs: KVM: Rename psci.rst to hypercalls.rst Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` [PATCH v7 6/9] Docs: KVM: Add doc for the bitmap firmware registers Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-03 17:14 ` Marc Zyngier [this message]
2022-05-03 17:14 ` Marc Zyngier
2022-05-03 17:14 ` Marc Zyngier
2022-05-02 23:38 ` [PATCH v7 7/9] tools: Import ARM SMCCC definitions Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` [PATCH v7 8/9] selftests: KVM: aarch64: Introduce hypercall ABI test Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` [PATCH v7 9/9] selftests: KVM: aarch64: Add the bitmap firmware registers to get-reg-list Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-02 23:38 ` Raghavendra Rao Ananta
2022-05-03 17:24 ` [PATCH v7 0/9] KVM: arm64: Add support for hypercall services selection Marc Zyngier
2022-05-03 17:24 ` Marc Zyngier
2022-05-03 17:24 ` Marc Zyngier
2022-05-03 18:49 ` Raghavendra Rao Ananta
2022-05-03 18:49 ` Raghavendra Rao Ananta
2022-05-03 18:49 ` Raghavendra Rao Ananta
2022-05-03 20:33 ` Marc Zyngier
2022-05-03 20:33 ` Marc Zyngier
2022-05-03 20:33 ` Marc Zyngier
2022-05-03 21:09 ` Raghavendra Rao Ananta
2022-05-03 21:09 ` Raghavendra Rao Ananta
2022-05-03 21:09 ` Raghavendra Rao Ananta
2022-05-16 16:44 ` Marc Zyngier
2022-05-16 16:44 ` Marc Zyngier
2022-05-16 16:44 ` Marc Zyngier
2022-05-16 18:30 ` Raghavendra Rao Ananta
2022-05-16 18:30 ` Raghavendra Rao Ananta
2022-05-16 18:30 ` Raghavendra Rao Ananta
2022-05-04 3:39 ` Oliver Upton
2022-05-04 3:39 ` Oliver Upton
2022-05-04 3:39 ` Oliver Upton
2022-05-04 12:01 ` Marc Zyngier
2022-05-04 12:01 ` Marc Zyngier
2022-05-04 12:01 ` Marc Zyngier
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