From: Jani Nikula <jani.nikula@linux.intel.com>
To: Aditya Swarup <aditya.swarup@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 00/22] Introduce Alderlake-S
Date: Thu, 21 Jan 2021 12:40:55 +0200 [thread overview]
Message-ID: <87a6t2mv2g.fsf@intel.com> (raw)
In-Reply-To: <20201205010844.361880-1-aditya.swarup@intel.com>
On Fri, 04 Dec 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
> Rev 3 with all the comments addressed from Rev 2:
> https://patchwork.freedesktop.org/series/82917/
Please rebase and resend the series, and let's get this reviewed and
merged to topic/adl-s-enabling.
BR,
Jani.
>
> Aditya Swarup (9):
> drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
> drm/i915/tgl: Add bound checks and simplify TGL REVID macros
> drm/i915/adl_s: Configure DPLL for ADL-S
> drm/i915/adl_s: Configure Port clock registers for ADL-S
> drm/i915/adl_s: Initialize display for ADL-S
> drm/i915/adl_s: Add adl-s ddc pin mapping
> drm/i915/adl_s: Add vbt port and aux channel settings for adls
> drm/i915/adl_s: Add display WAs for ADL-S
> drm/i915/adl_s: Add GT and CTX WAs for ADL-S
>
> Anusha Srivatsa (4):
> drm/i915/adl_s: Add PCH support
> drm/i915/adl_s: Add Interrupt Support
> drm/i915/adl_s: Add PHYs for Alderlake S
> drm/i915/adl_s: Load DMC
>
> Caz Yokoyama (3):
> drm/i915/adl_s: Add ADL-S platform info and PCI ids
> x86/gpu: add ADL_S stolen memory support
> drm/i915/adl_s: MCHBAR memory info registers are moved
>
> José Roberto de Souza (1):
> drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION
>
> Lucas De Marchi (1):
> drm/i915/adl_s: Add power wells
>
> Matt Roper (3):
> drm/i915/adl_s: Update combo PHY master/slave relationships
> drm/i915/adl_s: Update PHY_MISC programming
> drm/i915/adl_s: Re-use TGL GuC/HuC firmware
>
> Tejas Upadhyay (1):
> drm/i915/adl_s: Update memory bandwidth parameters
>
> arch/x86/kernel/early-quirks.c | 1 +
> drivers/gpu/drm/i915/display/intel_bios.c | 70 +++++++++--
> drivers/gpu/drm/i915/display/intel_bw.c | 8 ++
> .../gpu/drm/i915/display/intel_combo_phy.c | 23 +++-
> drivers/gpu/drm/i915/display/intel_csr.c | 10 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 64 ++++++----
> drivers/gpu/drm/i915/display/intel_display.c | 36 +++++-
> .../drm/i915/display/intel_display_power.c | 11 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 +++++-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 20 ++-
> drivers/gpu/drm/i915/display/intel_psr.c | 4 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 8 +-
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 +
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 119 ++++++++++++------
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +-
> drivers/gpu/drm/i915/i915_drv.h | 72 ++++++++---
> drivers/gpu/drm/i915/i915_irq.c | 5 +-
> drivers/gpu/drm/i915/i915_pci.c | 13 ++
> drivers/gpu/drm/i915/i915_reg.h | 54 +++++++-
> drivers/gpu/drm/i915/intel_device_info.c | 9 +-
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> drivers/gpu/drm/i915/intel_dram.c | 23 +++-
> drivers/gpu/drm/i915/intel_pch.c | 8 +-
> drivers/gpu/drm/i915/intel_pch.h | 3 +
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> include/drm/i915_pciids.h | 13 ++
> 26 files changed, 489 insertions(+), 134 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
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prev parent reply other threads:[~2021-01-21 10:41 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-05 1:08 [Intel-gfx] [PATCH 00/22] Introduce Alderlake-S Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 01/22] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 02/22] drm/i915/tgl: Add bound checks and simplify TGL REVID macros Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 03/22] drm/i915/adl_s: Add ADL-S platform info and PCI ids Aditya Swarup
2021-01-05 21:04 ` Souza, Jose
2020-12-05 1:08 ` [Intel-gfx] [PATCH 04/22] x86/gpu: add ADL_S stolen memory support Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 05/22] drm/i915/adl_s: Add PCH support Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 06/22] drm/i915/adl_s: Add Interrupt Support Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 07/22] drm/i915/adl_s: Add PHYs for Alderlake S Aditya Swarup
2021-01-12 3:33 ` Matt Roper
2020-12-05 1:08 ` [Intel-gfx] [PATCH 08/22] drm/i915/adl_s: Configure DPLL for ADL-S Aditya Swarup
2021-01-12 3:47 ` Matt Roper
2020-12-05 1:08 ` [Intel-gfx] [PATCH 09/22] drm/i915/adl_s: Configure Port clock registers " Aditya Swarup
2021-01-12 23:47 ` Matt Roper
2020-12-05 1:08 ` [Intel-gfx] [PATCH 10/22] drm/i915/adl_s: Initialize display " Aditya Swarup
2021-01-12 3:54 ` Matt Roper
2020-12-05 1:08 ` [Intel-gfx] [PATCH 11/22] drm/i915/adl_s: Add adl-s ddc pin mapping Aditya Swarup
2021-01-12 4:19 ` Matt Roper
2020-12-05 1:08 ` [Intel-gfx] [PATCH 12/22] drm/i915/adl_s: Add vbt port and aux channel settings for adls Aditya Swarup
2021-01-12 4:05 ` Matt Roper
2020-12-05 1:08 ` [Intel-gfx] [PATCH 13/22] drm/i915/adl_s: Update combo PHY master/slave relationships Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 14/22] drm/i915/adl_s: Update PHY_MISC programming Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 15/22] drm/i915/adl_s: Add display WAs for ADL-S Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 16/22] drm/i915/adl_s: Add GT and CTX " Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 17/22] drm/i915/adl_s: MCHBAR memory info registers are moved Aditya Swarup
2021-01-27 14:29 ` Lucas De Marchi
2020-12-05 1:08 ` [Intel-gfx] [PATCH 18/22] drm/i915/adl_s: Add power wells Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 19/22] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 20/22] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 21/22] drm/i915/adl_s: Load DMC Aditya Swarup
2020-12-05 1:08 ` [Intel-gfx] [PATCH 22/22] drm/i915/adl_s: Update memory bandwidth parameters Aditya Swarup
2020-12-05 1:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Alderlake-S (rev3) Patchwork
2020-12-05 1:22 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-05 1:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-05 5:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-21 10:40 ` Jani Nikula [this message]
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