From: Juan Quintela <quintela@redhat.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Alistair Francis <alistair@alistair23.me>,
Bin Meng <bin.meng@windriver.com>,
qemu-devel@nongnu.org,
Jean-Christophe Dubois <jcd@tribudubois.net>,
qemu-arm@nongnu.org, Peter Chubb <peter.chubb@nicta.com.au>,
Bin Meng <bmeng.cn@gmail.com>
Subject: Re: [RFC PATCH v6 06/11] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled
Date: Wed, 13 Jan 2021 14:46:40 +0100 [thread overview]
Message-ID: <87a6tdgda7.fsf@secure.mitica> (raw)
In-Reply-To: <20210112183529.2011863-7-f4bug@amsat.org> ("Philippe Mathieu-Daudé"'s message of "Tue, 12 Jan 2021 19:35:24 +0100")
Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> When the block is disabled, it stay it is 'internal reset logic'
> (internal clocks are gated off). Reading any register returns
> its reset value. Only update this value if the device is enabled.
>
> Ref: i.MX 6DQ Applications Processor Reference Manual (IMX6DQRM),
> chapter 21.7.3: Control Register (ECSPIx_CONREG)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Juan Quintela <quintela@redhat.com>
next prev parent reply other threads:[~2021-01-13 13:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-12 18:35 [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 01/11] hw/ssi: imx_spi: Use a macro for number of chip selects supported Philippe Mathieu-Daudé
2021-01-13 13:35 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 02/11] hw/ssi: imx_spi: Remove pointless variable initialization Philippe Mathieu-Daudé
2021-01-13 13:35 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 03/11] hw/ssi: imx_spi: Convert some debug printf()s to trace events Philippe Mathieu-Daudé
2021-01-13 13:36 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 04/11] hw/ssi: imx_spi: Reduce 'change_mask' variable scope Philippe Mathieu-Daudé
2021-01-13 13:41 ` Juan Quintela
2021-01-13 13:47 ` Juan Quintela
2021-01-15 15:24 ` Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 05/11] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value Philippe Mathieu-Daudé
2021-01-13 13:43 ` Juan Quintela
2021-01-12 18:35 ` [RFC PATCH v6 06/11] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled Philippe Mathieu-Daudé
2021-01-13 13:46 ` Juan Quintela [this message]
2021-01-12 18:35 ` [RFC PATCH v6 07/11] hw/ssi: imx_spi: Rework imx_spi_write() " Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 08/11] hw/ssi: imx_spi: Disable chip selects when controller is disabled Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 09/11] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 10/11] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Philippe Mathieu-Daudé
2021-01-12 18:35 ` [RFC PATCH v6 11/11] hw/ssi: imx_spi: Correct tx and rx fifo endianness Philippe Mathieu-Daudé
2021-01-13 3:29 ` [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-13 7:53 ` Philippe Mathieu-Daudé
2021-01-13 13:27 ` Bin Meng
2021-01-13 14:16 ` Bin Meng
2021-01-13 17:56 ` Philippe Mathieu-Daudé
2021-01-14 16:00 ` Philippe Mathieu-Daudé
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