From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915: Split ctx timestamp selftest into two
Date: Tue, 21 Apr 2020 16:45:19 +0300 [thread overview]
Message-ID: <87a735lzps.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <158747615980.19285.17681670652527012229@build.alporthouse.com>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Quoting Mika Kuoppala (2020-04-21 14:16:33)
>> @@ -4774,6 +4773,12 @@ static int live_lrc_timestamp(void *arg)
>> unsigned long heartbeat;
>> int i, err = 0;
>>
>> + if (rcs && data.engine->class != RENDER_CLASS)
>> + continue;
>> +
>> + if (!rcs && data.engine->class == RENDER_CLASS)
>> + continue;
>
> At least have a bit of finesse and do
> if (!(class & BIT(data.engine->engine->class)))
I looked at the engine mask and I knew there must be a better way.
-Mika
> continue;
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next prev parent reply other threads:[~2020-04-21 13:47 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 13:16 [Intel-gfx] [PATCH 1/5] drm/i915: Make define for lrc state offset Mika Kuoppala
2020-04-21 13:16 ` [Intel-gfx] [PATCH 2/5] drm/i915: Add per ctx batchbuffer wa for timestamp Mika Kuoppala
2020-04-22 19:32 ` Chris Wilson
2020-04-23 14:36 ` kbuild test robot
2020-04-23 14:36 ` kbuild test robot
2020-04-21 13:16 ` [Intel-gfx] [PATCH 3/5] drm/i915: Add live selftests for indirect ctx batchbuffers Mika Kuoppala
2020-04-21 13:18 ` Mika Kuoppala
2020-04-22 19:37 ` Chris Wilson
2020-04-23 10:40 ` Mika Kuoppala
2020-04-21 13:16 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL Mika Kuoppala
2020-04-21 13:33 ` Chris Wilson
2020-04-21 14:30 ` Mika Kuoppala
2020-04-22 19:39 ` Chris Wilson
2020-04-21 13:16 ` [Intel-gfx] [PATCH 5/5] drm/i915: Split ctx timestamp selftest into two Mika Kuoppala
2020-04-21 13:35 ` Chris Wilson
2020-04-21 13:45 ` Mika Kuoppala [this message]
2020-04-21 14:29 ` Mika Kuoppala
2020-04-22 19:41 ` Chris Wilson
2020-04-21 13:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Make define for lrc state offset Patchwork
2020-04-21 14:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-04-21 15:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Make define for lrc state offset (rev3) Patchwork
2020-04-21 15:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-21 20:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-04-22 18:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Make define for lrc state offset (rev4) Patchwork
2020-04-22 19:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-22 19:29 ` [Intel-gfx] [PATCH 1/5] drm/i915: Make define for lrc state offset Chris Wilson
2020-04-22 23:27 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Make define for lrc state offset (rev4) Patchwork
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