From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85E4FC2D0DB for ; Tue, 28 Jan 2020 12:32:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 62D662064C for ; Tue, 28 Jan 2020 12:32:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 62D662064C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E02C6E05A; Tue, 28 Jan 2020 12:32:57 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3C0A26E05A for ; Tue, 28 Jan 2020 12:32:56 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jan 2020 04:32:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,373,1574150400"; d="scan'208";a="429314065" Received: from gaia.fi.intel.com ([10.237.72.192]) by fmsmga006.fm.intel.com with ESMTP; 28 Jan 2020 04:32:54 -0800 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id 955845C1E0F; Tue, 28 Jan 2020 14:32:07 +0200 (EET) From: Mika Kuoppala To: Chris Wilson , intel-gfx@lists.freedesktop.org In-Reply-To: <20200127231540.3302516-3-chris@chris-wilson.co.uk> References: <20200127231540.3302516-1-chris@chris-wilson.co.uk> <20200127231540.3302516-3-chris@chris-wilson.co.uk> Date: Tue, 28 Jan 2020 14:32:07 +0200 Message-ID: <87a767n4mw.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH 3/6] drm/i915/gt: Tidy repetition in declaring gen8+ interrupts X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Chris Wilson writes: > We use the same interrupt mask for each engine, so define it once in a > local and reuse. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/gt/intel_gt_irq.c | 22 ++++++---------------- > 1 file changed, 6 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c > index 71873a4cafc0..7278b10e1a03 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c > @@ -344,25 +344,15 @@ void gen8_gt_irq_reset(struct intel_gt *gt) > > void gen8_gt_irq_postinstall(struct intel_gt *gt) > { > - struct intel_uncore *uncore = gt->uncore; > - > /* These are interrupts we'll toggle with the ring mask register */ > - u32 gt_interrupts[] = { > - (GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | > - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT | > - GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT | > - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT), > - > - (GT_RENDER_USER_INTERRUPT << GEN8_VCS0_IRQ_SHIFT | > - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS0_IRQ_SHIFT | > - GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT | > - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT), > - > + const u32 irqs = GT_RENDER_USER_INTERRUPT | GT_CONTEXT_SWITCH_INTERRUPT; > + const u32 gt_interrupts[] = { > + irqs << GEN8_RCS_IRQ_SHIFT | irqs << GEN8_BCS_IRQ_SHIFT, > + irqs << GEN8_VCS0_IRQ_SHIFT | irqs << GEN8_VCS1_IRQ_SHIFT, > 0, > - > - (GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT | > - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT) > + irqs << GEN8_VECS_IRQ_SHIFT, > }; > + struct intel_uncore *uncore = gt->uncore; > > gt->pm_ier = 0x0; > gt->pm_imr = ~gt->pm_ier; > -- > 2.25.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx