* [PATCH] drm/i915/execlists: stall on render flush before writing seqno
@ 2019-08-27 11:54 Chris Wilson
2019-08-27 12:03 ` Chris Wilson
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2019-08-27 11:54 UTC (permalink / raw)
To: intel-gfx
Quite rarely we see that the CS completion event fires before the
breadcrumb is coherent. Try rearranging the breadcrumb write sequence
such that the CS_STALL is on the post-sync write pipecontrol.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 80a3f1dbb456..669e8bd9f830 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2961,18 +2961,17 @@ static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs)
static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs)
{
- cs = gen8_emit_ggtt_write_rcs(cs,
- request->fence.seqno,
- request->timeline->hwsp_offset,
- PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
- PIPE_CONTROL_DEPTH_CACHE_FLUSH |
- PIPE_CONTROL_DC_FLUSH_ENABLE);
-
/* XXX flush+write+CS_STALL all in one upsets gem_concurrent_blt:kbl */
cs = gen8_emit_pipe_control(cs,
- PIPE_CONTROL_FLUSH_ENABLE |
- PIPE_CONTROL_CS_STALL,
+ PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
+ PIPE_CONTROL_DEPTH_CACHE_FLUSH |
+ PIPE_CONTROL_DC_FLUSH_ENABLE,
0);
+ cs = gen8_emit_ggtt_write_rcs(cs,
+ request->fence.seqno,
+ request->timeline->hwsp_offset,
+ PIPE_CONTROL_FLUSH_ENABLE |
+ PIPE_CONTROL_CS_STALL);
return gen8_emit_fini_breadcrumb_footer(request, cs);
}
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/execlists: stall on render flush before writing seqno
2019-08-27 11:54 [PATCH] drm/i915/execlists: stall on render flush before writing seqno Chris Wilson
@ 2019-08-27 12:03 ` Chris Wilson
2019-08-28 9:00 ` Mika Kuoppala
2019-08-27 12:47 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-08-28 11:15 ` ✓ Fi.CI.IGT: " Patchwork
2 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2019-08-27 12:03 UTC (permalink / raw)
To: intel-gfx
Quoting Chris Wilson (2019-08-27 12:54:13)
> Quite rarely we see that the CS completion event fires before the
> breadcrumb is coherent. Try rearranging the breadcrumb write sequence
> such that the CS_STALL is on the post-sync write pipecontrol.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 17 ++++++++---------
> 1 file changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 80a3f1dbb456..669e8bd9f830 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2961,18 +2961,17 @@ static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs)
>
> static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs)
> {
> - cs = gen8_emit_ggtt_write_rcs(cs,
> - request->fence.seqno,
> - request->timeline->hwsp_offset,
> - PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
> - PIPE_CONTROL_DEPTH_CACHE_FLUSH |
> - PIPE_CONTROL_DC_FLUSH_ENABLE);
> -
> /* XXX flush+write+CS_STALL all in one upsets gem_concurrent_blt:kbl */
> cs = gen8_emit_pipe_control(cs,
> - PIPE_CONTROL_FLUSH_ENABLE |
> - PIPE_CONTROL_CS_STALL,
> + PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
> + PIPE_CONTROL_DEPTH_CACHE_FLUSH |
> + PIPE_CONTROL_DC_FLUSH_ENABLE,
> 0);
> + cs = gen8_emit_ggtt_write_rcs(cs,
> + request->fence.seqno,
> + request->timeline->hwsp_offset,
> + PIPE_CONTROL_FLUSH_ENABLE |
Or perhaps we need PIPE_CONTROL_DC_FLUSH_ENABLE here.
I think that might make more sense (replace DC_FLUSH with whatever might
flush the post-sync write).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/execlists: stall on render flush before writing seqno
2019-08-27 11:54 [PATCH] drm/i915/execlists: stall on render flush before writing seqno Chris Wilson
2019-08-27 12:03 ` Chris Wilson
@ 2019-08-27 12:47 ` Patchwork
2019-08-28 11:15 ` ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-08-27 12:47 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: stall on render flush before writing seqno
URL : https://patchwork.freedesktop.org/series/65869/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6791 -> Patchwork_14199
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/
Known issues
------------
Here are the changes found in Patchwork_14199 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [PASS][1] -> [DMESG-FAIL][2] ([fdo#111108])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [PASS][3] -> [FAIL][4] ([fdo#110387])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][5] -> [FAIL][6] ([fdo#103167])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@prime_vgem@basic-fence-flip:
- fi-ilk-650: [PASS][7] -> [DMESG-WARN][8] ([fdo#106387]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html
#### Possible fixes ####
* igt@i915_selftest@live_reset:
- {fi-icl-dsi}: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-icl-dsi/igt@i915_selftest@live_reset.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-icl-dsi/igt@i915_selftest@live_reset.html
#### Warnings ####
* igt@i915_module_load@reload:
- fi-icl-u2: [DMESG-WARN][11] ([fdo#110595]) -> [DMESG-WARN][12] ([fdo#110595] / [fdo#111214])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-icl-u2/igt@i915_module_load@reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-icl-u2/igt@i915_module_load@reload.html
* igt@i915_pm_rpm@module-reload:
- fi-icl-u2: [INCOMPLETE][13] ([fdo#107713] / [fdo#108840]) -> [DMESG-WARN][14] ([fdo#110595])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/fi-icl-u2/igt@i915_pm_rpm@module-reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/fi-icl-u2/igt@i915_pm_rpm@module-reload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387
[fdo#110595]: https://bugs.freedesktop.org/show_bug.cgi?id=110595
[fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
Participating hosts (52 -> 44)
------------------------------
Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6791 -> Patchwork_14199
CI-20190529: 20190529
CI_DRM_6791: 911cf01f441a754e8ee511d4968f711c54e20ed8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5150: a4e8217bcdfef9bb523f26a9084bbf615a6e8abb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14199: 4e569e09404eb7660c687c368be7ea7dea352458 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4e569e09404e drm/i915/execlists: stall on render flush before writing seqno
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/execlists: stall on render flush before writing seqno
2019-08-27 12:03 ` Chris Wilson
@ 2019-08-28 9:00 ` Mika Kuoppala
2019-08-28 9:07 ` Chris Wilson
0 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2019-08-28 9:00 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Quoting Chris Wilson (2019-08-27 12:54:13)
>> Quite rarely we see that the CS completion event fires before the
>> breadcrumb is coherent. Try rearranging the breadcrumb write sequence
>> such that the CS_STALL is on the post-sync write pipecontrol.
>>
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/intel_lrc.c | 17 ++++++++---------
>> 1 file changed, 8 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
>> index 80a3f1dbb456..669e8bd9f830 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
>> @@ -2961,18 +2961,17 @@ static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs)
>>
>> static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs)
>> {
>> - cs = gen8_emit_ggtt_write_rcs(cs,
>> - request->fence.seqno,
>> - request->timeline->hwsp_offset,
>> - PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
>> - PIPE_CONTROL_DEPTH_CACHE_FLUSH |
>> - PIPE_CONTROL_DC_FLUSH_ENABLE);
>> -
>> /* XXX flush+write+CS_STALL all in one upsets gem_concurrent_blt:kbl */
>> cs = gen8_emit_pipe_control(cs,
>> - PIPE_CONTROL_FLUSH_ENABLE |
>> - PIPE_CONTROL_CS_STALL,
>> + PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
>> + PIPE_CONTROL_DEPTH_CACHE_FLUSH |
>> + PIPE_CONTROL_DC_FLUSH_ENABLE,
>> 0);
>> + cs = gen8_emit_ggtt_write_rcs(cs,
>> + request->fence.seqno,
>> + request->timeline->hwsp_offset,
>> + PIPE_CONTROL_FLUSH_ENABLE |
>
> Or perhaps we need PIPE_CONTROL_DC_FLUSH_ENABLE here.
>
> I think that might make more sense (replace DC_FLUSH with whatever might
> flush the post-sync write).
Would it make sense to try to be as much similar as possible
with the ->emit_flush?
If so, iterating further, now with seqno being per context,
be exactly the same as emit_flush and start to use ppgtt seqnos?
-Mika
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/execlists: stall on render flush before writing seqno
2019-08-28 9:00 ` Mika Kuoppala
@ 2019-08-28 9:07 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2019-08-28 9:07 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-08-28 10:00:35)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > Quoting Chris Wilson (2019-08-27 12:54:13)
> >> Quite rarely we see that the CS completion event fires before the
> >> breadcrumb is coherent. Try rearranging the breadcrumb write sequence
> >> such that the CS_STALL is on the post-sync write pipecontrol.
> >>
> >> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/gt/intel_lrc.c | 17 ++++++++---------
> >> 1 file changed, 8 insertions(+), 9 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> >> index 80a3f1dbb456..669e8bd9f830 100644
> >> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> >> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> >> @@ -2961,18 +2961,17 @@ static u32 *gen8_emit_fini_breadcrumb(struct i915_request *request, u32 *cs)
> >>
> >> static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs)
> >> {
> >> - cs = gen8_emit_ggtt_write_rcs(cs,
> >> - request->fence.seqno,
> >> - request->timeline->hwsp_offset,
> >> - PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
> >> - PIPE_CONTROL_DEPTH_CACHE_FLUSH |
> >> - PIPE_CONTROL_DC_FLUSH_ENABLE);
> >> -
> >> /* XXX flush+write+CS_STALL all in one upsets gem_concurrent_blt:kbl */
> >> cs = gen8_emit_pipe_control(cs,
> >> - PIPE_CONTROL_FLUSH_ENABLE |
> >> - PIPE_CONTROL_CS_STALL,
> >> + PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
> >> + PIPE_CONTROL_DEPTH_CACHE_FLUSH |
> >> + PIPE_CONTROL_DC_FLUSH_ENABLE,
> >> 0);
> >> + cs = gen8_emit_ggtt_write_rcs(cs,
> >> + request->fence.seqno,
> >> + request->timeline->hwsp_offset,
> >> + PIPE_CONTROL_FLUSH_ENABLE |
> >
> > Or perhaps we need PIPE_CONTROL_DC_FLUSH_ENABLE here.
> >
> > I think that might make more sense (replace DC_FLUSH with whatever might
> > flush the post-sync write).
>
> Would it make sense to try to be as much similar as possible
> with the ->emit_flush?
That's where we started and had to refine due to being able to detect
incoherency. It's not as if we we used emit_flush(EMIT_FLUSH) for
anything other than a delay in emit_pdp...
drivers/gpu/drm/i915/gem/i915_gem_context.c: err = engine->emit_flush(rq, EMIT_INVALIDATE);
drivers/gpu/drm/i915/gt/intel_lrc.c: ret = request->engine->emit_flush(request, EMIT_INVALIDATE);
drivers/gpu/drm/i915/gt/intel_ringbuffer.c: ret = engine->emit_flush(rq, EMIT_INVALIDATE);
drivers/gpu/drm/i915/gt/intel_ringbuffer.c: ret = engine->emit_flush(rq, EMIT_INVALIDATE);
drivers/gpu/drm/i915/gt/intel_ringbuffer.c: ret = engine->emit_flush(rq, EMIT_FLUSH);
drivers/gpu/drm/i915/gt/intel_ringbuffer.c: ret = request->engine->emit_flush(request, EMIT_INVALIDATE);
drivers/gpu/drm/i915/gt/intel_workarounds.c: ret = rq->engine->emit_flush(rq, EMIT_BARRIER);
drivers/gpu/drm/i915/gt/intel_workarounds.c: ret = rq->engine->emit_flush(rq, EMIT_BARRIER);
drivers/gpu/drm/i915/gvt/mmio_context.c: ret = req->engine->emit_flush(req, EMIT_BARRIER);
drivers/gpu/drm/i915/gvt/mmio_context.c: ret = req->engine->emit_flush(req, EMIT_BARRIER);
The EMIT_FLUSH in the ringbuffer pd update is also purely arbitrary.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/execlists: stall on render flush before writing seqno
2019-08-27 11:54 [PATCH] drm/i915/execlists: stall on render flush before writing seqno Chris Wilson
2019-08-27 12:03 ` Chris Wilson
2019-08-27 12:47 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2019-08-28 11:15 ` Patchwork
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-08-28 11:15 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: stall on render flush before writing seqno
URL : https://patchwork.freedesktop.org/series/65869/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6791_full -> Patchwork_14199_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_14199_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@out-order-bsd2:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276]) +16 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb6/igt@gem_exec_schedule@out-order-bsd2.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-snb: [PASS][5] -> [SKIP][6] ([fdo#109271]) +5 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-snb2/igt@kms_big_fb@linear-32bpp-rotate-0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-snb2/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-glk: [PASS][7] -> [FAIL][8] ([fdo#103060])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-glk2/igt@kms_flip@2x-dpms-vs-vblank-race.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-glk5/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@flip-vs-suspend:
- shard-hsw: [PASS][9] -> [INCOMPLETE][10] ([fdo#103540])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-hsw6/igt@kms_flip@flip-vs-suspend.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-hsw5/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +5 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl8/igt@kms_frontbuffer_tracking@fbc-suspend.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#108341])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb8/igt@kms_psr@no_drrs.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb5/igt@kms_psr@psr2_no_drrs.html
* igt@kms_setmode@basic:
- shard-hsw: [PASS][19] -> [FAIL][20] ([fdo#99912])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-hsw6/igt@kms_setmode@basic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-hsw6/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
- shard-skl: [PASS][21] -> [INCOMPLETE][22] ([fdo#104108]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-skl6/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-skl1/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
* igt@kms_vblank@pipe-b-wait-idle-hang:
- shard-apl: [PASS][23] -> [INCOMPLETE][24] ([fdo#103927]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl5/igt@kms_vblank@pipe-b-wait-idle-hang.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl7/igt@kms_vblank@pipe-b-wait-idle-hang.html
#### Possible fixes ####
* igt@gem_ctx_isolation@vcs0-s3:
- shard-iclb: [INCOMPLETE][25] ([fdo#107713] / [fdo#109100]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb7/igt@gem_ctx_isolation@vcs0-s3.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb1/igt@gem_ctx_isolation@vcs0-s3.html
* igt@gem_exec_schedule@promotion-bsd:
- shard-iclb: [SKIP][27] ([fdo#111325]) -> [PASS][28] +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb1/igt@gem_exec_schedule@promotion-bsd.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb5/igt@gem_exec_schedule@promotion-bsd.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [DMESG-WARN][29] ([fdo#108566]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl1/igt@gem_workarounds@suspend-resume.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl5/igt@gem_workarounds@suspend-resume.html
* igt@i915_pm_rpm@i2c:
- shard-hsw: [FAIL][31] ([fdo#104097]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-hsw5/igt@i915_pm_rpm@i2c.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-hsw8/igt@i915_pm_rpm@i2c.html
* igt@kms_color@pipe-b-ctm-blue-to-red:
- shard-skl: [FAIL][33] ([fdo#107201]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-skl9/igt@kms_color@pipe-b-ctm-blue-to-red.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-skl8/igt@kms_color@pipe-b-ctm-blue-to-red.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen:
- shard-apl: [FAIL][35] ([fdo#103232]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl6/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html
* igt@kms_flip@flip-vs-modeset-vs-hang:
- shard-apl: [INCOMPLETE][37] ([fdo#103927]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl5/igt@kms_flip@flip-vs-modeset-vs-hang.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl6/igt@kms_flip@flip-vs-modeset-vs-hang.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [INCOMPLETE][39] ([fdo#109507]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-skl2/igt@kms_flip@flip-vs-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-skl10/igt@kms_flip@flip-vs-suspend.html
- shard-kbl: [INCOMPLETE][41] ([fdo#103665]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-kbl1/igt@kms_flip@flip-vs-suspend.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-kbl6/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-iclb: [FAIL][43] ([fdo#103167]) -> [PASS][44] +4 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-skl: [FAIL][45] ([fdo#103167]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-iclb: [INCOMPLETE][47] ([fdo#107713] / [fdo#110042]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [FAIL][49] ([fdo#108145]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][51] ([fdo#108145] / [fdo#110403]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][53] ([fdo#109441]) -> [PASS][54] +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][55] ([fdo#109276]) -> [PASS][56] +15 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [SKIP][57] ([fdo#109276]) -> [FAIL][58] ([fdo#111330])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb8/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [FAIL][59] ([fdo#111330]) -> [SKIP][60] ([fdo#109276]) +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-iclb1/igt@gem_mocs_settings@mocs-settings-bsd2.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-iclb5/igt@gem_mocs_settings@mocs-settings-bsd2.html
* igt@kms_busy@basic-flip-b:
- shard-kbl: [DMESG-WARN][61] ([fdo#111317]) -> [FAIL][62] ([fdo#111171 ])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-kbl2/igt@kms_busy@basic-flip-b.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-kbl1/igt@kms_busy@basic-flip-b.html
* igt@kms_content_protection@atomic:
- shard-apl: [FAIL][63] ([fdo#110321] / [fdo#110336]) -> [INCOMPLETE][64] ([fdo#103927])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl7/igt@kms_content_protection@atomic.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl3/igt@kms_content_protection@atomic.html
* igt@kms_psr@cursor_mmap_gtt:
- shard-apl: [SKIP][65] ([fdo#109271]) -> [INCOMPLETE][66] ([fdo#103927])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6791/shard-apl6/igt@kms_psr@cursor_mmap_gtt.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/shard-apl8/igt@kms_psr@cursor_mmap_gtt.html
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104097]: https://bugs.freedesktop.org/show_bug.cgi?id=104097
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#110042]: https://bugs.freedesktop.org/show_bug.cgi?id=110042
[fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
[fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#111171 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111171
[fdo#111317]: https://bugs.freedesktop.org/show_bug.cgi?id=111317
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6791 -> Patchwork_14199
CI-20190529: 20190529
CI_DRM_6791: 911cf01f441a754e8ee511d4968f711c54e20ed8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5150: a4e8217bcdfef9bb523f26a9084bbf615a6e8abb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14199: 4e569e09404eb7660c687c368be7ea7dea352458 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14199/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-08-28 11:15 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-08-27 11:54 [PATCH] drm/i915/execlists: stall on render flush before writing seqno Chris Wilson
2019-08-27 12:03 ` Chris Wilson
2019-08-28 9:00 ` Mika Kuoppala
2019-08-28 9:07 ` Chris Wilson
2019-08-27 12:47 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-08-28 11:15 ` ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.