From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH 01/20] drm/i915/icl: Define register for DSI PLL Date: Fri, 29 Jun 2018 14:43:03 +0300 Message-ID: <87a7rdstrs.fsf@intel.com> References: <1529058084-31777-1-git-send-email-madhav.chauhan@intel.com> <1529058084-31777-2-git-send-email-madhav.chauhan@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4D8F6F020 for ; Fri, 29 Jun 2018 11:43:18 +0000 (UTC) In-Reply-To: <1529058084-31777-2-git-send-email-madhav.chauhan@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Madhav Chauhan , intel-gfx@lists.freedesktop.org Cc: paulo.r.zanoni@intel.com, rodrigo.vivi@intel.com List-Id: intel-gfx@lists.freedesktop.org T24gRnJpLCAxNSBKdW4gMjAxOCwgTWFkaGF2IENoYXVoYW4gPG1hZGhhdi5jaGF1aGFuQGludGVs LmNvbT4gd3JvdGU6Cj4gVGhpcyBwYXRjaCBhZGRzIHRoZSBuZXcgcmVnaXN0ZXJzIGFuZCBjb3Jy ZXNwb25kaW5nIGJpdCBkZWZpbml0aW9ucwo+IHdoaWNoIHdpbGwgYmUgdXNlZCBmb3IgcHJvZ3Jh bW1pbmcvZW5hYmxlIERTSSBQTEwuCj4KPiBTaWduZWQtb2ZmLWJ5OiBNYWRoYXYgQ2hhdWhhbiA8 bWFkaGF2LmNoYXVoYW5AaW50ZWwuY29tPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9p OTE1X3JlZy5oIHwgMTIgKysrKysrKysrKysrCj4gIDEgZmlsZSBjaGFuZ2VkLCAxMiBpbnNlcnRp b25zKCspCj4KPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaCBi L2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKPiBpbmRleCBmMDMxN2JkZS4uYmYyZDNl NCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCj4gKysrIGIv ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaAo+IEBAIC05MzM5LDYgKzkzMzksMTggQEAg ZW51bSBza2xfcG93ZXJfZ2F0ZSB7Cj4gICNkZWZpbmUgTUlQSU9fVFhFU0NfQ0xLX0RJVjIJCQlf TU1JTygweDE2MDAwOCkKPiAgI2RlZmluZSAgR0xLX1RYX0VTQ19DTEtfRElWMl9NQVNLCQkJMHgz RkYKPiAgCj4gKyNkZWZpbmUgX0lDTF9EU0lfRVNDX0NMS19ESVYwCQkweDZiMDkwCj4gKyNkZWZp bmUgX0lDTF9EU0lfRVNDX0NMS19ESVYxCQkweDZiODkwCj4gKyNkZWZpbmUgSUNMX0RTSV9FU0Nf Q0xLX0RJVihwb3J0KQlfTU1JT19QT1JUKChwb3J0KSwJXAo+ICsJCQkJCQkJX0lDTF9EU0lfRVND X0NMS19ESVYwLCBcCj4gKwkJCQkJCQlfSUNMX0RTSV9FU0NfQ0xLX0RJVjEpCj4gKyNkZWZpbmUg X0lDTF9EUEhZX0VTQ19DTEtfRElWMAkJMHgxNjIxOTAKPiArI2RlZmluZSBfSUNMX0RQSFlfRVND X0NMS19ESVYxCQkweDZDMTkwCj4gKyNkZWZpbmUgSUNMX0RQSFlfRVNDX0NMS19ESVYocG9ydCkJ X01NSU9fUE9SVCgocG9ydCksCVwKPiArCQkJCQkJX0lDTF9EUEhZX0VTQ19DTEtfRElWMCwgXAo+ ICsJCQkJCQlfSUNMX0RQSFlfRVNDX0NMS19ESVYxKQo+ICsjZGVmaW5lIElDTF9FU0NfQ0xLX0RJ Vl9NQVNLCQkweDFmZgogICAgICAgICAgXgoKTml0cGljaywgMyBzcGFjZXMgdGhlcmUuIFdpdGgg dGhhdCBmaXhlZCwKClJldmlld2VkLWJ5OiBKYW5pIE5pa3VsYSA8amFuaS5uaWt1bGFAaW50ZWwu Y29tPgoKU2lkZSBub3RlLCB5b3UgY291bGQgZGVmaW5lIHNoaWZ0cyBhbmQgbWFza3MgZm9yIGJv dGggZXNjYXBlIGNsb2NrCmRpdmlkZXIgTSBhbmQgYnl0ZSBjbG9ja3MgcGVyIGVzY2FwZSBjbG9j ayB3aGlsZSBhdCBpdC4KCj4gKwo+ICAvKiBHZW40KyBUaW1lc3RhbXAgYW5kIFBpcGUgRnJhbWUg dGltZSBzdGFtcCByZWdpc3RlcnMgKi8KPiAgI2RlZmluZSBHRU40X1RJTUVTVEFNUAkJX01NSU8o MHgyMzU4KQo+ICAjZGVmaW5lIElMS19USU1FU1RBTVBfSEkJX01NSU8oMHg3MDA3MCkKCi0tIApK YW5pIE5pa3VsYSwgSW50ZWwgT3BlbiBTb3VyY2UgR3JhcGhpY3MgQ2VudGVyCl9fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxp c3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNr dG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=