All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>,
	Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org, "Wood, Thomas" <thomas.wood@intel.com>
Subject: Re: [PATCH i-g-t] quick_dump/skl: Add more pipe/plane registers
Date: Tue, 12 May 2015 11:58:40 +0300	[thread overview]
Message-ID: <87a8xa41fj.fsf@intel.com> (raw)
In-Reply-To: <20150512065019.GT15256@phenom.ffwll.local>

On Tue, 12 May 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Mon, May 11, 2015 at 07:36:07PM +0100, Damien Lespiau wrote:
>> With the recent developments, add scaler and NV12 registers to the dump.
>> Also add the cursor registers that were missing in the first batch.
>> 
>> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
>
> Jani has this shiny new swiss army knive tool now ...

...which reuses the quick dump register definitions.

I wonder if we should a) install the quick dump definitions, and b) have
intel_reg check the install location for the files (this should be a
trivial modification). Thomas?

BR,
Jani.



> -Daniel
>
>> ---
>>  tools/quick_dump/skl_display.txt | 97 ++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 97 insertions(+)
>> 
>> diff --git a/tools/quick_dump/skl_display.txt b/tools/quick_dump/skl_display.txt
>> index 29f6524..37c7d99 100644
>> --- a/tools/quick_dump/skl_display.txt
>> +++ b/tools/quick_dump/skl_display.txt
>> @@ -20,6 +20,9 @@
>>  ('PLANE_BUF_CFG_1_A', '0x7027c', '')
>>  ('PLANE_BUF_CFG_2_A', '0x7037c', '')
>>  ('PLANE_BUF_CFG_3_A', '0x7047c', '')
>> +('PLANE_NV12_BUF_CFG_1_A', '0x70278', '')
>> +('PLANE_NV12_BUF_CFG_2_A', '0x70378', '')
>> +('PLANE_NV12_BUF_CFG_3_A', '0x70478', '')
>>  ('PLANE_CTL_1_A', '0x70180', '')
>>  ('PLANE_CTL_2_A', '0x70280', '')
>>  ('PLANE_CTL_3_A', '0x70380', '')
>> @@ -35,6 +38,9 @@
>>  ('PLANE_OFFSET_1_A', '0x701a4', '')
>>  ('PLANE_OFFSET_2_A', '0x702a4', '')
>>  ('PLANE_OFFSET_3_A', '0x703a4', '')
>> +('PLANE_AUX_OFFSET_1_A', '0x701c4', '')
>> +('PLANE_AUX_OFFSET_2_A', '0x702c4', '')
>> +('PLANE_AUX_OFFSET_3_A', '0x703c4', '')
>>  ('PLANE_POS_1_A', '0x7018c', '')
>>  ('PLANE_POS_2_A', '0x7028c', '')
>>  ('PLANE_POS_3_A', '0x7038c', '')
>> @@ -77,10 +83,42 @@
>>  ('PLANE_WM_TRANS_1_A', '0x70268', '')
>>  ('PLANE_WM_TRANS_2_A', '0x70368', '')
>>  ('PLANE_WM_TRANS_3_A', '0x70468', '')
>> +# PIPE_A_CURSOR_PLANE
>> +('CUR_BUF_CFG_A', '0x7017c', '')
>> +('CUR_BASE_A', '0x70084', '')
>> +('CUR_CTL_A', '0x70080', '')
>> +('CUR_FBC_CTL_A', '0x700a0', '')
>> +('CUR_PAL_A_*', '0x70090', '')
>> +('CUR_POS_A', '0x70088', '')
>> +('CUR_SURFLIVE_A', '0x700ac', '')
>> +('CUR_WM_A_*', '0x70140', '')
>> +('CUR_WM_TRANS_A', '0x70168', '')
>> +# PIPE_SCALER_A
>> +('PS_CTRL_1_A', '0x68180', '')
>> +('PS_CTRL_2_A', '0x68280', '')
>> +('PS_ECC_STAT_1_A', '0x681d0', '')
>> +('PS_ECC_STAT_2_A', '0x682d0', '')
>> +('PS_HPHASE_1_A', '0x68194', '')
>> +('PS_HPHASE_2_A', '0x68294', '')
>> +('PS_HSCALE_1_A', '0x68190', '')
>> +('PS_HSCALE_2_A', '0x68290', '')
>> +('PS_PWR_GATE_1_A', '0x68160', '')
>> +('PS_PWR_GATE_2_A', '0x68260', '')
>> +('PS_VPHASE_1_A', '0x68188', '')
>> +('PS_VPHASE_2_A', '0x68288', '')
>> +('PS_VSCALE_1_A', '0x68184', '')
>> +('PS_VSCALE_2_A', '0x68284', '')
>> +('PS_WIN_POS_1_A', '0x68170', '')
>> +('PS_WIN_POS_2_A', '0x68270', '')
>> +('PS_WIN_SZ_1_A', '0x68174', '')
>> +('PS_WIN_SZ_2_A', '0x68274', '')
>>  # PIPE_B_PLANE
>>  ('PLANE_BUF_CFG_1_B', '0x7127c', '')
>>  ('PLANE_BUF_CFG_2_B', '0x7137c', '')
>>  ('PLANE_BUF_CFG_3_B', '0x7147c', '')
>> +('PLANE_NV12_BUF_CFG_1_B', '0x71278', '')
>> +('PLANE_NV12_BUF_CFG_2_B', '0x71378', '')
>> +('PLANE_NV12_BUF_CFG_3_B', '0x71478', '')
>>  ('PLANE_CTL_1_B', '0x71180', '')
>>  ('PLANE_CTL_2_B', '0x71280', '')
>>  ('PLANE_CTL_3_B', '0x71380', '')
>> @@ -96,6 +134,9 @@
>>  ('PLANE_OFFSET_1_B', '0x711a4', '')
>>  ('PLANE_OFFSET_2_B', '0x712a4', '')
>>  ('PLANE_OFFSET_3_B', '0x713a4', '')
>> +('PLANE_AUX_OFFSET_1_B', '0x711c4', '')
>> +('PLANE_AUX_OFFSET_2_B', '0x712c4', '')
>> +('PLANE_AUX_OFFSET_3_B', '0x713c4', '')
>>  ('PLANE_POS_1_B', '0x7118c', '')
>>  ('PLANE_POS_2_B', '0x7128c', '')
>>  ('PLANE_POS_3_B', '0x7138c', '')
>> @@ -138,10 +179,43 @@
>>  ('PLANE_WM_TRANS_1_B', '0x71268', '')
>>  ('PLANE_WM_TRANS_2_B', '0x71368', '')
>>  ('PLANE_WM_TRANS_3_B', '0x71468', '')
>> +# PIPE_B_CURSOR_PLANE
>> +('CUR_BUF_CFG_B', '0x7117c', '')
>> +('CUR_BASE_B', '0x71084', '')
>> +('CUR_CTL_B', '0x71080', '')
>> +('CUR_FBC_CTL_B', '0x710a0', '')
>> +('CUR_PAL_B_*', '0x71090', '')
>> +('CUR_POS_B', '0x71088', '')
>> +('CUR_SURFLIVE_B', '0x710ac', '')
>> +('CUR_WM_B_*', '0x71140', '')
>> +('CUR_WM_TRANS_B', '0x71168', '')
>> +# PIPE_SCALER_B
>> +('PS_CTRL_1_B', '0x68980', '')
>> +('PS_CTRL_2_B', '0x68a80', '')
>> +('PS_ECC_STAT_1_B', '0x689d0', '')
>> +('PS_ECC_STAT_2_B', '0x68ad0', '')
>> +('PS_HPHASE_1_B', '0x68994', '')
>> +('PS_HPHASE_2_B', '0x68a94', '')
>> +('PS_HSCALE_1_B', '0x68990', '')
>> +('PS_HSCALE_2_B', '0x68a90', '')
>> +('PS_PWR_GATE_1_B', '0x68960', '')
>> +('PS_PWR_GATE_2_B', '0x68a60', '')
>> +('PS_VPHASE_1_B', '0x68988', '')
>> +('PS_VPHASE_2_B', '0x68a88', '')
>> +('PS_VSCALE_1_B', '0x68984', '')
>> +('PS_VSCALE_2_B', '0x68a84', '')
>> +('PS_WIN_POS_1_B', '0x68970', '')
>> +('PS_WIN_POS_2_B', '0x68a70', '')
>>  # PIPE_C_PLANE
>>  ('PLANE_BUF_CFG_1_C', '0x7227c', '')
>>  ('PLANE_BUF_CFG_2_C', '0x7237c', '')
>>  ('PLANE_BUF_CFG_3_C', '0x7247c', '')
>> +('PLANE_NV12_BUF_CFG_1_C', '0x72278', '')
>> +('PLANE_NV12_BUF_CFG_2_C', '0x72378', '')
>> +('PLANE_NV12_BUF_CFG_3_C', '0x72478', '')
>> +('PLANE_AUX_DIST_1_C', '0x721c0', '')
>> +('PLANE_AUX_DIST_2_C', '0x722c0', '')
>> +('PLANE_AUX_DIST_3_C', '0x723c0', '')
>>  ('PLANE_CTL_1_C', '0x72180', '')
>>  ('PLANE_CTL_2_C', '0x72280', '')
>>  ('PLANE_CTL_3_C', '0x72380', '')
>> @@ -157,6 +231,9 @@
>>  ('PLANE_OFFSET_1_C', '0x721a4', '')
>>  ('PLANE_OFFSET_2_C', '0x722a4', '')
>>  ('PLANE_OFFSET_3_C', '0x723a4', '')
>> +('PLANE_AUX_OFFSET_1_C', '0x721c4', '')
>> +('PLANE_AUX_OFFSET_2_C', '0x722c4', '')
>> +('PLANE_AUX_OFFSET_3_C', '0x723c4', '')
>>  ('PLANE_POS_1_C', '0x7218c', '')
>>  ('PLANE_POS_2_C', '0x7228c', '')
>>  ('PLANE_POS_3_C', '0x7238c', '')
>> @@ -199,6 +276,26 @@
>>  ('PLANE_WM_TRANS_1_C', '0x72268', '')
>>  ('PLANE_WM_TRANS_2_C', '0x72368', '')
>>  ('PLANE_WM_TRANS_3_C', '0x72468', '')
>> +# PIPE_C_CURSOR_PLANE
>> +('CUR_BUF_CFG_C', '0x7217c', '')
>> +('CUR_BASE_C', '0x72084', '')
>> +('CUR_CTL_C', '0x72080', '')
>> +('CUR_FBC_CTL_C', '0x720a0', '')
>> +('CUR_PAL_C_*', '0x72090', '')
>> +('CUR_POS_C', '0x72088', '')
>> +('CUR_SURFLIVE_C', '0x720ac', '')
>> +('CUR_WM_C_*', '0x72140', '')
>> +('CUR_WM_TRANS_C', '0x72168', '')
>> +# PIPE_SCALER_C
>> +('PS_CTRL_1_C', '0x69180', '')
>> +('PS_ECC_STAT_1_C', '0x691d0', '')
>> +('PS_HPHASE_1_C', '0x69194', '')
>> +('PS_HSCALE_1_C', '0x69190', '')
>> +('PS_PWR_GATE_1_C', '0x69160', '')
>> +('PS_VPHASE_1_C', '0x69188', '')
>> +('PS_VSCALE_1_C', '0x69184', '')
>> +('PS_WIN_POS_1_C', '0x69170', '')
>> +('PS_WIN_SZ_1_C', '0x69174', '')
>>  # TRANSCODER_EDP_CONTROL
>>  ('TRANS_CONF_EDP', '0x7f008', '')
>>  # TRANSCODER_EDP_TIMING
>> -- 
>> 2.1.0
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-05-12  8:56 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-11 18:36 [PATCH i-g-t] quick_dump/skl: Add more pipe/plane registers Damien Lespiau
2015-05-12  6:50 ` Daniel Vetter
2015-05-12  8:58   ` Jani Nikula [this message]
2015-06-10 10:30     ` [PATCH i-g-t] intel_reg: install and load the register files Thomas Wood
2015-06-15 13:12       ` Thomas Wood

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87a8xa41fj.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=damien.lespiau@intel.com \
    --cc=daniel@ffwll.ch \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=thomas.wood@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.