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From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: kvmarm@lists.linux.dev, James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	kvm@vger.kernel.org, Fuad Tabba <tabba@google.com>,
	Jintack Lim <jintack.lim@linaro.org>,
	Christoffer Dall <christoffer.dall@arm.com>
Subject: Re: [PATCH v2 01/15] KVM: arm64: nv: Forward FP/ASIMD traps to guest hypervisor
Date: Fri, 14 Jun 2024 11:56:20 +0100	[thread overview]
Message-ID: <87bk433i97.wl-maz@kernel.org> (raw)
In-Reply-To: <20240613201756.3258227-2-oliver.upton@linux.dev>

On Thu, 13 Jun 2024 21:17:42 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
> 
> From: Jintack Lim <jintack.lim@linaro.org>
> 
> Give precedence to the guest hypervisor's trap configuration when
> routing an FP/ASIMD trap taken to EL2. Take advantage of the
> infrastructure for translating CPTR_EL2 into the VHE (i.e. EL1) format
> and base the trap decision solely on the VHE view of the register. The
> in-memory value of CPTR_EL2 will always be up to date for the guest
> hypervisor (more on that later), so just read it directly from memory.
> 
> Bury all of this behind a macro keyed off of the CPTR bitfield in
> anticipation of supporting other traps (e.g. SVE).
> 
> Signed-off-by: Jintack Lim <jintack.lim@linaro.org>
> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
> [maz: account for HCR_EL2.E2H when testing for TFP/FPEN, with
>  all the hard work actually being done by Chase Conklin]
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> [ oliver: translate nVHE->VHE format for testing traps; macro for reuse
>  in other CPTR_EL2.xEN fields ]
> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
> ---
>  arch/arm64/include/asm/kvm_emulate.h    | 43 +++++++++++++++++++++++++
>  arch/arm64/include/asm/kvm_nested.h     |  1 -
>  arch/arm64/kvm/handle_exit.c            | 16 ++++++---
>  arch/arm64/kvm/hyp/include/hyp/switch.h |  3 ++
>  4 files changed, 58 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
> index 501e3e019c93..c3c5a5999ed7 100644
> --- a/arch/arm64/include/asm/kvm_emulate.h
> +++ b/arch/arm64/include/asm/kvm_emulate.h
> @@ -11,6 +11,7 @@
>  #ifndef __ARM64_KVM_EMULATE_H__
>  #define __ARM64_KVM_EMULATE_H__
>  
> +#include <linux/bitfield.h>
>  #include <linux/kvm_host.h>
>  
>  #include <asm/debug-monitors.h>
> @@ -599,4 +600,46 @@ static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu)
>  
>  	kvm_write_cptr_el2(val);
>  }
> +
> +/*
> + * Returns a 'sanitised' view of CPTR_EL2, translating from nVHE to the VHE
> + * format if E2H isn't set.
> + */
> +static inline u64 vcpu_sanitised_cptr_el2(const struct kvm_vcpu *vcpu)
> +{
> +	u64 cptr = __vcpu_sys_reg(vcpu, CPTR_EL2);
> +
> +	if (!vcpu_el2_e2h_is_set(vcpu))
> +		cptr = translate_cptr_el2_to_cpacr_el1(cptr);
> +
> +	return cptr;
> +}
> +
> +static inline bool ____cptr_xen_trap_enabled(const struct kvm_vcpu *vcpu,
> +					     unsigned int xen)
> +{
> +	switch (xen) {
> +	case 0b00:
> +	case 0b10:
> +		return true;
> +	case 0b01:
> +		return vcpu_el2_tge_is_set(vcpu) && !vcpu_is_el2(vcpu);
> +	case 0b11:
> +	default:
> +		return false;
> +	}
> +}
> +
> +#define __guest_hyp_cptr_xen_trap_enabled(vcpu, xen)				\
> +	(!vcpu_has_nv(vcpu) ? false :						\
> +	 ____cptr_xen_trap_enabled(vcpu,					\
> +				   SYS_FIELD_GET(CPACR_ELx, xen,		\
> +						 vcpu_sanitised_cptr_el2(vcpu))))
> +
> +static inline bool guest_hyp_fpsimd_traps_enabled(const struct kvm_vcpu *vcpu)
> +{
> +	return __guest_hyp_cptr_xen_trap_enabled(vcpu, FPEN);
> +}
> +
> +
>  #endif /* __ARM64_KVM_EMULATE_H__ */
> diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
> index 5e0ab0596246..5d55f76254c3 100644
> --- a/arch/arm64/include/asm/kvm_nested.h
> +++ b/arch/arm64/include/asm/kvm_nested.h
> @@ -75,5 +75,4 @@ static inline bool kvm_auth_eretax(struct kvm_vcpu *vcpu, u64 *elr)
>  	return false;
>  }
>  #endif
> -
>  #endif /* __ARM64_KVM_NESTED_H */

nit: spurious change.

Aside from that:

Reviewed-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2024-06-14 10:56 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-13 20:17 [PATCH v2 00/15] KVM: arm64: nv: FPSIMD/SVE, plus some other CPTR goodies Oliver Upton
2024-06-13 20:17 ` [PATCH v2 01/15] KVM: arm64: nv: Forward FP/ASIMD traps to guest hypervisor Oliver Upton
2024-06-14 10:56   ` Marc Zyngier [this message]
2024-06-13 20:17 ` [PATCH v2 02/15] KVM: arm64: nv: Forward SVE " Oliver Upton
2024-06-13 20:17 ` [PATCH v2 03/15] KVM: arm64: nv: Handle CPACR_EL1 traps Oliver Upton
2024-06-14 13:20   ` Marc Zyngier
2024-06-14 20:06     ` Oliver Upton
2024-06-13 20:17 ` [PATCH v2 04/15] KVM: arm64: nv: Load guest FP state for ZCR_EL2 trap Oliver Upton
2024-06-13 20:17 ` [PATCH v2 05/15] KVM: arm64: nv: Load guest hyp's ZCR into EL1 state Oliver Upton
2024-06-14 11:14   ` Marc Zyngier
2024-06-14 20:08     ` Oliver Upton
2024-06-13 20:17 ` [PATCH v2 06/15] KVM: arm64: nv: Handle ZCR_EL2 traps Oliver Upton
2024-06-13 20:17 ` [PATCH v2 07/15] KVM: arm64: nv: Save guest's ZCR_EL2 when in hyp context Oliver Upton
2024-06-13 20:17 ` [PATCH v2 08/15] KVM: arm64: nv: Use guest hypervisor's max VL when running nested guest Oliver Upton
2024-06-13 20:17 ` [PATCH v2 09/15] KVM: arm64: nv: Ensure correct VL is loaded before saving SVE state Oliver Upton
2024-06-13 20:17 ` [PATCH v2 10/15] KVM: arm64: Spin off helper for programming CPTR traps Oliver Upton
2024-06-13 20:17 ` [PATCH v2 11/15] KVM: arm64: nv: Honor guest hypervisor's FP/SVE traps in CPTR_EL2 Oliver Upton
2024-06-13 20:17 ` [PATCH v2 12/15] KVM: arm64: nv: Add TCPAC/TTA to CPTR->CPACR conversion helper Oliver Upton
2024-06-13 20:17 ` [PATCH v2 13/15] KVM: arm64: nv: Add trap description for CPTR_EL2 Oliver Upton
2024-06-13 20:17 ` [PATCH v2 14/15] KVM: arm64: nv: Add additional trap setup " Oliver Upton
2024-06-13 20:17 ` [PATCH v2 15/15] KVM: arm64: Allow the use of SVE+NV Oliver Upton
2024-06-14 13:36 ` [PATCH v2 00/15] KVM: arm64: nv: FPSIMD/SVE, plus some other CPTR goodies Marc Zyngier

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