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From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Saravana Kannan <saravanak@google.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Frank Rowand <frowand.list@gmail.com>,
	linux-riscv@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v9 05/15] irqchip/sifive-plic: Convert PLIC driver into a platform driver
Date: Fri, 29 Sep 2023 13:32:52 +0100	[thread overview]
Message-ID: <87bkdlma6j.wl-maz@kernel.org> (raw)
In-Reply-To: <20230928061207.1841513-6-apatel@ventanamicro.com>

On Thu, 28 Sep 2023 07:11:57 +0100,
Anup Patel <apatel@ventanamicro.com> wrote:
> 
> The PLIC driver does not require very early initialization so let
> us convert it into a platform driver.
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> 
> As part of the conversion, the PLIC probing undergoes the following
> changes:
> 1. Use dev_info(), dev_err() and dev_warn() instead of pr_info(),
>    pr_err() and pr_warn()
> 2. Use devm_xyz() APIs wherever applicable
> 3. PLIC is now probed after CPUs are brought-up so we have to
>    setup cpuhp state after context handler of all online CPUs
>    are initialized otherwise we see crash on multi-socket systems
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  drivers/irqchip/irq-sifive-plic.c | 242 +++++++++++++++++++-----------
>  1 file changed, 154 insertions(+), 88 deletions(-)
>

[...]

> +core_initcall(plic_init);

Or not. There are only two choices: either you absolutely require
early init, and you stick with the current situation, or you don't,
and you can rely on dependencies.

I'm not prepared to have a third option.

	M.

-- 
Without deviation from the norm, progress is not possible.

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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Saravana Kannan <saravanak@google.com>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v9 05/15] irqchip/sifive-plic: Convert PLIC driver into a platform driver
Date: Fri, 29 Sep 2023 13:32:52 +0100	[thread overview]
Message-ID: <87bkdlma6j.wl-maz@kernel.org> (raw)
In-Reply-To: <20230928061207.1841513-6-apatel@ventanamicro.com>

On Thu, 28 Sep 2023 07:11:57 +0100,
Anup Patel <apatel@ventanamicro.com> wrote:
> 
> The PLIC driver does not require very early initialization so let
> us convert it into a platform driver.
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> 
> As part of the conversion, the PLIC probing undergoes the following
> changes:
> 1. Use dev_info(), dev_err() and dev_warn() instead of pr_info(),
>    pr_err() and pr_warn()
> 2. Use devm_xyz() APIs wherever applicable
> 3. PLIC is now probed after CPUs are brought-up so we have to
>    setup cpuhp state after context handler of all online CPUs
>    are initialized otherwise we see crash on multi-socket systems
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  drivers/irqchip/irq-sifive-plic.c | 242 +++++++++++++++++++-----------
>  1 file changed, 154 insertions(+), 88 deletions(-)
>

[...]

> +core_initcall(plic_init);

Or not. There are only two choices: either you absolutely require
early init, and you stick with the current situation, or you don't,
and you can rely on dependencies.

I'm not prepared to have a third option.

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2023-09-29 12:33 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-28  6:11 [PATCH v9 00/15] Linux RISC-V AIA Support Anup Patel
2023-09-28  6:11 ` Anup Patel
2023-09-28  6:11 ` [PATCH v9 01/15] RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-28  6:11 ` [PATCH v9 02/15] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-28 14:39   ` Rob Herring
2023-09-28 14:39     ` Rob Herring
2023-09-29  0:09     ` Saravana Kannan
2023-09-29  0:09       ` Saravana Kannan
2023-09-28  6:11 ` [PATCH v9 03/15] drivers: irqchip/riscv-intc: Mark all INTC nodes as initialized Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-28  6:11 ` [PATCH v9 04/15] irqchip/sifive-plic: Fix syscore registration for multi-socket systems Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-28  6:11 ` [PATCH v9 05/15] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-29 12:32   ` Marc Zyngier [this message]
2023-09-29 12:32     ` Marc Zyngier
2023-10-02 15:18     ` Anup Patel
2023-10-02 15:18       ` Anup Patel
2023-09-28  6:11 ` [PATCH v9 06/15] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-28  6:11 ` [PATCH v9 07/15] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-09-28  6:11   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 08/15] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 09/15] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 10/15] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 11/15] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 12/15] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 13/15] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 14/15] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-09-28  6:12   ` Anup Patel
2023-09-28  6:12 ` [PATCH v9 15/15] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2023-09-28  6:12   ` Anup Patel

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