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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Andrzej Hajda <andrzej.hajda@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/display/vlv: fix pixel overlap register update
Date: Mon, 30 Jan 2023 14:58:18 +0200	[thread overview]
Message-ID: <87bkmg41sl.fsf@intel.com> (raw)
In-Reply-To: <87wn6nu46j.fsf@intel.com>

On Mon, 19 Dec 2022, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Mon, 19 Dec 2022, Andrzej Hajda <andrzej.hajda@intel.com> wrote:
>> To update properly bits in the register the mask should be used
>> to clear old value and then the result should be or-ed with new
>> value, for such updates there is separate helper intel_de_rmw.
>>
>> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
>
> Seems like the right thing to do.
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

And pushed both to din, thanks for the patches.

BR,
Jani.


>
>
>> ---
>>  drivers/gpu/drm/i915/display/vlv_dsi.c | 24 +++++++++---------------
>>  1 file changed, 9 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
>> index 662bdb656aa304..f5268997a3e172 100644
>> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
>> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
>> @@ -649,23 +649,17 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder,
>>  	enum port port;
>>  
>>  	if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
>> -		u32 temp;
>> +		u32 temp = intel_dsi->pixel_overlap;
>> +
>>  		if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
>> -			for_each_dsi_port(port, intel_dsi->ports) {
>> -				temp = intel_de_read(dev_priv,
>> -						     MIPI_CTRL(port));
>> -				temp &= ~BXT_PIXEL_OVERLAP_CNT_MASK |
>> -					intel_dsi->pixel_overlap <<
>> -					BXT_PIXEL_OVERLAP_CNT_SHIFT;
>> -				intel_de_write(dev_priv, MIPI_CTRL(port),
>> -					       temp);
>> -			}
>> +			for_each_dsi_port(port, intel_dsi->ports)
>> +				intel_de_rmw(dev_priv, MIPI_CTRL(port),
>> +					     BXT_PIXEL_OVERLAP_CNT_MASK,
>> +					     temp << BXT_PIXEL_OVERLAP_CNT_SHIFT);
>>  		} else {
>> -			temp = intel_de_read(dev_priv, VLV_CHICKEN_3);
>> -			temp &= ~PIXEL_OVERLAP_CNT_MASK |
>> -					intel_dsi->pixel_overlap <<
>> -					PIXEL_OVERLAP_CNT_SHIFT;
>> -			intel_de_write(dev_priv, VLV_CHICKEN_3, temp);
>> +			intel_de_rmw(dev_priv, VLV_CHICKEN_3,
>> +				     PIXEL_OVERLAP_CNT_MASK,
>> +				     temp << PIXEL_OVERLAP_CNT_SHIFT);
>>  		}
>>  	}

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2023-01-30 12:58 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-19  9:24 [Intel-gfx] [PATCH 1/2] drm/i915/display/vlv: fix pixel overlap register update Andrzej Hajda
2022-12-19  9:24 ` [Intel-gfx] [PATCH 2/2] drm/i915/display/vlv: use intel_de_rmw if possible Andrzej Hajda
2022-12-19  9:35 ` [Intel-gfx] [PATCH 1/2] drm/i915/display/vlv: fix pixel overlap register update Jani Nikula
2023-01-30 12:58   ` Jani Nikula [this message]
2022-12-19 14:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2022-12-19 15:35   ` Andrzej Hajda
2022-12-21 14:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/display/vlv: fix pixel overlap register update (rev2) Patchwork
2022-12-22  8:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/vlv: fix pixel overlap register update (rev3) Patchwork
2022-12-22 14:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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