From: Jani Nikula <jani.nikula@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 0/6] More GT register cleanup
Date: Thu, 10 Feb 2022 16:26:13 +0200 [thread overview]
Message-ID: <87bkze94sa.fsf@intel.com> (raw)
In-Reply-To: <20220209051140.1599643-1-matthew.d.roper@intel.com>
On Tue, 08 Feb 2022, Matt Roper <matthew.d.roper@intel.com> wrote:
> Another collection of cleanup patches for intel_gt_regs.h to make it a
> bit less painful to work with.
I didn't review this but I agree with what's being done.
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
>
> Matt Roper (6):
> drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18
> drm/i915/gt: Move SFC lock bits to intel_engine_regs.h
> drm/i915/gt: Use parameterized RING_MI_MODE
> drm/i915/gt: Cleanup spacing of intel_gt_regs.h
> drm/i915/gt: Use consistent offset notation in intel_gt_regs.h
> drm/i915/gt: Order GT registers by MMIO offset
>
> drivers/gpu/drm/i915/gt/intel_engine_regs.h | 23 +
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2623 +++++++++----------
> drivers/gpu/drm/i915/gt/intel_reset.c | 14 +-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +-
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 5 files changed, 1333 insertions(+), 1335 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-02-10 14:26 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 5:11 [Intel-gfx] [PATCH 0/6] More GT register cleanup Matt Roper
2022-02-09 5:11 ` [Intel-gfx] [PATCH 1/6] drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18 Matt Roper
2022-02-15 21:23 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 2/6] drm/i915/gt: Move SFC lock bits to intel_engine_regs.h Matt Roper
2022-02-15 21:28 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 3/6] drm/i915/gt: Use parameterized RING_MI_MODE Matt Roper
2022-02-15 21:33 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 4/6] drm/i915/gt: Cleanup spacing of intel_gt_regs.h Matt Roper
2022-02-15 22:03 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 5/6] drm/i915/gt: Use consistent offset notation in intel_gt_regs.h Matt Roper
2022-02-15 21:49 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 6/6] drm/i915/gt: Order GT registers by MMIO offset Matt Roper
2022-02-09 8:11 ` Ville Syrjälä
2022-02-15 22:42 ` Matt Atwood
2022-02-09 5:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More GT register cleanup Patchwork
2022-02-09 5:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-09 5:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-09 7:07 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-16 20:50 ` Matt Roper
2022-02-10 14:26 ` Jani Nikula [this message]
2022-02-10 14:27 ` [Intel-gfx] [PATCH 0/6] " Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87bkze94sa.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=matthew.d.roper@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.