From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F310C433B4 for ; Fri, 7 May 2021 10:19:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6B0F861460 for ; Fri, 7 May 2021 10:19:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233394AbhEGKUv convert rfc822-to-8bit (ORCPT ); Fri, 7 May 2021 06:20:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:40442 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230232AbhEGKUu (ORCPT ); Fri, 7 May 2021 06:20:50 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 095D761443; Fri, 7 May 2021 10:19:51 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1lexaG-00BRP8-RS; Fri, 07 May 2021 11:19:48 +0100 Date: Fri, 07 May 2021 11:19:48 +0100 Message-ID: <87bl9mq20r.wl-maz@kernel.org> From: Marc Zyngier To: Pali =?UTF-8?B?Um9ow6Fy?= Cc: Lorenzo Pieralisi , Thomas Petazzoni , Rob Herring , Bjorn Helgaas , Russell King , Marek =?UTF-8?B?QmVow7pu?= , Remi Pommarel , Xogium , Tomasz Maciej Nowak , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 18/42] PCI: aardvark: Correctly clear and unmask all MSI interrupts In-Reply-To: <20210506153153.30454-19-pali@kernel.org> References: <20210506153153.30454-1-pali@kernel.org> <20210506153153.30454-19-pali@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: pali@kernel.org, lorenzo.pieralisi@arm.com, thomas.petazzoni@bootlin.com, robh@kernel.org, bhelgaas@google.com, rmk+kernel@armlinux.org.uk, kabel@kernel.org, repk@triplefau.lt, contact@xogium.me, tmn505@gmail.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Thu, 06 May 2021 16:31:29 +0100, Pali Rohár wrote: > > Define a new macro PCIE_MSI_ALL_MASK and use it for masking, unmasking and > clearing all MSI interrupts. > > Signed-off-by: Pali Rohár > Reviewed-by: Marek Behún > Cc: stable@vger.kernel.org > --- > drivers/pci/controller/pci-aardvark.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index 498810c00b6d..5e0243b2c473 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -117,6 +117,7 @@ > #define PCIE_MSI_ADDR_HIGH_REG (CONTROL_BASE_ADDR + 0x54) > #define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58) > #define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C) > +#define PCIE_MSI_ALL_MASK GENMASK(31, 0) > #define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C) > #define PCIE_MSI_DATA_MASK GENMASK(15, 0) > > @@ -386,19 +387,22 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) > advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); > > /* Clear all interrupts */ > + advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG); > advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG); > advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); > advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); > > /* Disable All ISR0/1 Sources */ > - reg = PCIE_ISR0_ALL_MASK; > - reg &= ~PCIE_ISR0_MSI_INT_PENDING; > - advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); > - > + advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG); > advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); > > /* Unmask all MSIs */ > - advk_writel(pcie, 0, PCIE_MSI_MASK_REG); > + advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); I really wonder why you'd unmask all MSIs. Yes, the current code does that already, but I'd expect MSIs to be individually unmasked as they get enabled by the core code. Thanks, M. > + > + /* Unmask summary MSI interrupt */ > + reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); > + reg &= ~PCIE_ISR0_MSI_INT_PENDING; > + advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); > > /* Enable summary interrupt for GIC SPI source */ > reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); > @@ -1049,7 +1053,7 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) > > msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); > msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG); > - msi_status = msi_val & ~msi_mask; > + msi_status = msi_val & ((~msi_mask) & PCIE_MSI_ALL_MASK); > > for (msi_idx = 0; msi_idx < MSI_IRQ_NUM; msi_idx++) { > if (!(BIT(msi_idx) & msi_status)) > -- > 2.20.1 > > -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45D04C433ED for ; Fri, 7 May 2021 10:21:30 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ACBD161443 for ; Fri, 7 May 2021 10:21:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ACBD161443 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Subject:Cc:To: From:Message-ID:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=LSthBR7qUv/i5THsvJE2W/YaZDoN/VVqStWQ7qjL3Ic=; b=YeHn6KdmMYlMMH0Qc8rh8B3Sv 6xOTfUNvTDNMw3x8DEOx1YH8EeNW2X3Elta3uQhAY0ZptenlIUtJ0JO1c0oz/PATWe7VuEYR2a2md ouaIvXu5i+hUvl86SvU4SGud2lb7kcAG+IbfxYdfOIBvPEbo25Qn1nn2zW1QxQNywcxPrC6FDUGpX EPAaFHCC9w6m/Wrj9Gb8vVXJ1fOOpj0eNjKryOKsjBq2byj/+FoVlStSMRWiYQPJitmXww05qzQwr vEhILoGyBJpOgcxodYXn2v2P9x3XcVU2+Gpoy5h5d4KOgck6bkp1BOAZG5ekK2djKSNZ5D8L9Darv pZQlL/buw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lexaO-006n0E-0Z; Fri, 07 May 2021 10:19:57 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lexaM-006mzw-2g for linux-arm-kernel@desiato.infradead.org; Fri, 07 May 2021 10:19:54 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Subject:Cc:To:From: Message-ID:Date:Sender:Reply-To:Content-ID:Content-Description; bh=i5Fq/TkhyuF12n6UC/drLNvffzMTOS78fsr+vLgRKak=; b=kD5RSTLvPtFOSRowlU5kJ75Cyb qDZIU3I2x67dsXeGRihO82SpnD9oiwS+5XZjJ2aAcrg83n2jyaqrNVpcqjCfie+eCFTMGoE/0S+wX uqHHqp7x/BFr8UIua2UrSM2AZb1SdyEIrYst3WLBBydKlbrBZVezL5gCkWNC9ElvbM227aeHKnaDb MvHtMZkxfbTZm4mGoe90K91nS8CNyp07PW01tlYmnpWOWVeD8/ivkr67luW1XF/K4rrgeSikhFKKu 2r8NOfCEHcimFLjcuZluyzy7SXCBKzQ/gMGMphbZtCCHLzlnWN+DVGzYW/nTezFFNsj49Y2HZP/63 GCd2h7Bw==; Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lexaJ-006lzh-GJ for linux-arm-kernel@lists.infradead.org; Fri, 07 May 2021 10:19:52 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 095D761443; Fri, 7 May 2021 10:19:51 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1lexaG-00BRP8-RS; Fri, 07 May 2021 11:19:48 +0100 Date: Fri, 07 May 2021 11:19:48 +0100 Message-ID: <87bl9mq20r.wl-maz@kernel.org> From: Marc Zyngier To: Pali =?UTF-8?B?Um9ow6Fy?= Cc: Lorenzo Pieralisi , Thomas Petazzoni , Rob Herring , Bjorn Helgaas , Russell King , Marek =?UTF-8?B?QmVow7pu?= , Remi Pommarel , Xogium , Tomasz Maciej Nowak , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 18/42] PCI: aardvark: Correctly clear and unmask all MSI interrupts In-Reply-To: <20210506153153.30454-19-pali@kernel.org> References: <20210506153153.30454-1-pali@kernel.org> <20210506153153.30454-19-pali@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: pali@kernel.org, lorenzo.pieralisi@arm.com, thomas.petazzoni@bootlin.com, robh@kernel.org, bhelgaas@google.com, rmk+kernel@armlinux.org.uk, kabel@kernel.org, repk@triplefau.lt, contact@xogium.me, tmn505@gmail.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210507_031951_623058_025A1C1F X-CRM114-Status: GOOD ( 22.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVGh1LCAwNiBNYXkgMjAyMSAxNjozMToyOSArMDEwMCwKUGFsaSBSb2jDoXIgPHBhbGlAa2Vy bmVsLm9yZz4gd3JvdGU6Cj4gCj4gRGVmaW5lIGEgbmV3IG1hY3JvIFBDSUVfTVNJX0FMTF9NQVNL IGFuZCB1c2UgaXQgZm9yIG1hc2tpbmcsIHVubWFza2luZyBhbmQKPiBjbGVhcmluZyBhbGwgTVNJ IGludGVycnVwdHMuCj4gCj4gU2lnbmVkLW9mZi1ieTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVs Lm9yZz4KPiBSZXZpZXdlZC1ieTogTWFyZWsgQmVow7puIDxrYWJlbEBrZXJuZWwub3JnPgo+IENj OiBzdGFibGVAdmdlci5rZXJuZWwub3JnCj4gLS0tCj4gIGRyaXZlcnMvcGNpL2NvbnRyb2xsZXIv cGNpLWFhcmR2YXJrLmMgfCAxNiArKysrKysrKysrLS0tLS0tCj4gIDEgZmlsZSBjaGFuZ2VkLCAx MCBpbnNlcnRpb25zKCspLCA2IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJz L3BjaS9jb250cm9sbGVyL3BjaS1hYXJkdmFyay5jIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9w Y2ktYWFyZHZhcmsuYwo+IGluZGV4IDQ5ODgxMGMwMGI2ZC4uNWUwMjQzYjJjNDczIDEwMDY0NAo+ IC0tLSBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvcGNpLWFhcmR2YXJrLmMKPiArKysgYi9kcml2 ZXJzL3BjaS9jb250cm9sbGVyL3BjaS1hYXJkdmFyay5jCj4gQEAgLTExNyw2ICsxMTcsNyBAQAo+ ICAjZGVmaW5lIFBDSUVfTVNJX0FERFJfSElHSF9SRUcJCQkoQ09OVFJPTF9CQVNFX0FERFIgKyAw eDU0KQo+ICAjZGVmaW5lIFBDSUVfTVNJX1NUQVRVU19SRUcJCQkoQ09OVFJPTF9CQVNFX0FERFIg KyAweDU4KQo+ICAjZGVmaW5lIFBDSUVfTVNJX01BU0tfUkVHCQkJKENPTlRST0xfQkFTRV9BRERS ICsgMHg1QykKPiArI2RlZmluZSAgICAgUENJRV9NU0lfQUxMX01BU0sJCQlHRU5NQVNLKDMxLCAw KQo+ICAjZGVmaW5lIFBDSUVfTVNJX1BBWUxPQURfUkVHCQkJKENPTlRST0xfQkFTRV9BRERSICsg MHg5QykKPiAgI2RlZmluZSAgICAgUENJRV9NU0lfREFUQV9NQVNLCQkJR0VOTUFTSygxNSwgMCkK PiAgCj4gQEAgLTM4NiwxOSArMzg3LDIyIEBAIHN0YXRpYyB2b2lkIGFkdmtfcGNpZV9zZXR1cF9o dyhzdHJ1Y3QgYWR2a19wY2llICpwY2llKQo+ICAJYWR2a193cml0ZWwocGNpZSwgcmVnLCBQQ0lF X0NPUkVfQ1RSTDJfUkVHKTsKPiAgCj4gIAkvKiBDbGVhciBhbGwgaW50ZXJydXB0cyAqLwo+ICsJ YWR2a193cml0ZWwocGNpZSwgUENJRV9NU0lfQUxMX01BU0ssIFBDSUVfTVNJX1NUQVRVU19SRUcp Owo+ICAJYWR2a193cml0ZWwocGNpZSwgUENJRV9JU1IwX0FMTF9NQVNLLCBQQ0lFX0lTUjBfUkVH KTsKPiAgCWFkdmtfd3JpdGVsKHBjaWUsIFBDSUVfSVNSMV9BTExfTUFTSywgUENJRV9JU1IxX1JF Ryk7Cj4gIAlhZHZrX3dyaXRlbChwY2llLCBQQ0lFX0lSUV9BTExfTUFTSywgSE9TVF9DVFJMX0lO VF9TVEFUVVNfUkVHKTsKPiAgCj4gIAkvKiBEaXNhYmxlIEFsbCBJU1IwLzEgU291cmNlcyAqLwo+ IC0JcmVnID0gUENJRV9JU1IwX0FMTF9NQVNLOwo+IC0JcmVnICY9IH5QQ0lFX0lTUjBfTVNJX0lO VF9QRU5ESU5HOwo+IC0JYWR2a193cml0ZWwocGNpZSwgcmVnLCBQQ0lFX0lTUjBfTUFTS19SRUcp Owo+IC0KPiArCWFkdmtfd3JpdGVsKHBjaWUsIFBDSUVfSVNSMF9BTExfTUFTSywgUENJRV9JU1Iw X01BU0tfUkVHKTsKPiAgCWFkdmtfd3JpdGVsKHBjaWUsIFBDSUVfSVNSMV9BTExfTUFTSywgUENJ RV9JU1IxX01BU0tfUkVHKTsKPiAgCj4gIAkvKiBVbm1hc2sgYWxsIE1TSXMgKi8KPiAtCWFkdmtf d3JpdGVsKHBjaWUsIDAsIFBDSUVfTVNJX01BU0tfUkVHKTsKPiArCWFkdmtfd3JpdGVsKHBjaWUs IH4odTMyKVBDSUVfTVNJX0FMTF9NQVNLLCBQQ0lFX01TSV9NQVNLX1JFRyk7CgpJIHJlYWxseSB3 b25kZXIgd2h5IHlvdSdkIHVubWFzayBhbGwgTVNJcy4gWWVzLCB0aGUgY3VycmVudCBjb2RlIGRv ZXMKdGhhdCBhbHJlYWR5LCBidXQgSSdkIGV4cGVjdCBNU0lzIHRvIGJlIGluZGl2aWR1YWxseSB1 bm1hc2tlZCBhcyB0aGV5CmdldCBlbmFibGVkIGJ5IHRoZSBjb3JlIGNvZGUuCgpUaGFua3MsCgoJ TS4KCQo+ICsKPiArCS8qIFVubWFzayBzdW1tYXJ5IE1TSSBpbnRlcnJ1cHQgKi8KPiArCXJlZyA9 IGFkdmtfcmVhZGwocGNpZSwgUENJRV9JU1IwX01BU0tfUkVHKTsKPiArCXJlZyAmPSB+UENJRV9J U1IwX01TSV9JTlRfUEVORElORzsKPiArCWFkdmtfd3JpdGVsKHBjaWUsIHJlZywgUENJRV9JU1Iw X01BU0tfUkVHKTsKPiAgCj4gIAkvKiBFbmFibGUgc3VtbWFyeSBpbnRlcnJ1cHQgZm9yIEdJQyBT UEkgc291cmNlICovCj4gIAlyZWcgPSBQQ0lFX0lSUV9BTExfTUFTSyAmICh+UENJRV9JUlFfRU5B QkxFX0lOVFNfTUFTSyk7Cj4gQEAgLTEwNDksNyArMTA1Myw3IEBAIHN0YXRpYyB2b2lkIGFkdmtf cGNpZV9oYW5kbGVfbXNpKHN0cnVjdCBhZHZrX3BjaWUgKnBjaWUpCj4gIAo+ICAJbXNpX21hc2sg PSBhZHZrX3JlYWRsKHBjaWUsIFBDSUVfTVNJX01BU0tfUkVHKTsKPiAgCW1zaV92YWwgPSBhZHZr X3JlYWRsKHBjaWUsIFBDSUVfTVNJX1NUQVRVU19SRUcpOwo+IC0JbXNpX3N0YXR1cyA9IG1zaV92 YWwgJiB+bXNpX21hc2s7Cj4gKwltc2lfc3RhdHVzID0gbXNpX3ZhbCAmICgofm1zaV9tYXNrKSAm IFBDSUVfTVNJX0FMTF9NQVNLKTsKPiAgCj4gIAlmb3IgKG1zaV9pZHggPSAwOyBtc2lfaWR4IDwg TVNJX0lSUV9OVU07IG1zaV9pZHgrKykgewo+ICAJCWlmICghKEJJVChtc2lfaWR4KSAmIG1zaV9z dGF0dXMpKQo+IC0tIAo+IDIuMjAuMQo+IAo+IAoKLS0gCldpdGhvdXQgZGV2aWF0aW9uIGZyb20g dGhlIG5vcm0sIHByb2dyZXNzIGlzIG5vdCBwb3NzaWJsZS4KCl9fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0 CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFk ZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK