From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH v7 2/2] drm/lima: driver for ARM Mali4xx GPUs Date: Wed, 06 Mar 2019 09:37:02 -0800 Message-ID: <87bm2nkipt.fsf@anholt.net> References: <20190306152339.5340-1-yuq825@gmail.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0663537696==" Return-path: In-Reply-To: <20190306152339.5340-1-yuq825@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , lima@lists.freedesktop.org, Andreas Baierl , Maxime Ripard , Christian =?utf-8?Q?K?= =?utf-8?Q?=C3=B6nig?= , Neil Armstrong , Sam Ravnborg , David Airlie , Qiang Yu , Simon Shields , Vasily Khoruzhick , Sean Paul , Erico Nunes List-Id: dri-devel@lists.freedesktop.org --===============0663537696== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha512; protocol="application/pgp-signature" --=-=-= Content-Type: text/plain Qiang Yu writes: > - Mali 4xx GPUs have two kinds of processors GP and PP. GP is for > OpenGL vertex shader processing and PP is for fragment shader > processing. Each processor has its own MMU so prcessors work in > virtual address space. > - There's only one GP but multiple PP (max 4 for mali 400 and 8 > for mali 450) in the same mali 4xx GPU. All PPs are grouped > togather to handle a single fragment shader task divided by > FB output tiled pixels. Mali 400 user space driver is > responsible for assign target tiled pixels to each PP, but mali > 450 has a HW module called DLBU to dynamically balance each > PP's load. > - User space driver allocate buffer object and map into GPU > virtual address space, upload command stream and draw data with > CPU mmap of the buffer object, then submit task to GP/PP with > a register frame indicating where is the command stream and misc > settings. > - There's no command stream validation/relocation due to each user > process has its own GPU virtual address space. GP/PP's MMU switch > virtual address space before running two tasks from different > user process. Error or evil user space code just get MMU fault > or GP/PP error IRQ, then the HW/SW will be recovered. > - Use GEM+shmem for MM. Currently just alloc and pin memory when > gem object creation. GPU vm map of the buffer is also done in > the alloc stage in kernel space. We may delay the memory > allocation and real GPU vm map to command submission stage in the > furture as improvement. > - Use drm_sched for GPU task schedule. Each OpenGL context should > have a lima context object in the kernel to distinguish tasks > from different user. drm_sched gets task from each lima context > in a fair way. > > mesa driver can be found here before upstreamed: > https://gitlab.freedesktop.org/lima/mesa > > v7: > - remove lima_fence_ops with default value > - move fence slab create to device probe > - check pad ioctl args to be zero > - add comments for user/kernel interface Thanks for adding the comments! That helps a lot. I feel pretty good about the ABI at this point. Reviewed-by: Eric Anholt --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEE/JuuFDWp9/ZkuCBXtdYpNtH8nugFAlyABT4ACgkQtdYpNtH8 nuiqpg//dtli0ccO9OB/Qx+0eWDE02YMERGDPNK2Qq2B8N7cYvFiDGeHXH8r2e1X aFnO4zvLri0NeXiqTnPV2h19EUC6yX6CSft/P7Za0mXZMvYF66QkPf8Ia+63eLZa qb47m25BkYZWYJq3TM4buZ8DTzwV3OEkAB3l9J/PWVFnzJ5hsb+x3DKEtyP7aod0 F+1mDl3x+ckjfEwSTQqQSMZuef30Ma2uIyxZSxY6crihS3nPgOrWH/e2xPexric+ scLfYXxo/fboAlunBcO+020Idi8rRgtlCHgFvWkYpkmgVIYZ+j/ylMqtPUNgqfoF jbvWb62eYobWvLqKKRuLGBLKNuXmR8hRBrrw0C2So6q9JTs9p+Kda5E61Gi1MpKr AHVspqG3/tcHJ3Pxw0ZuCUlsSGK7vXTHNlckE0Gm9USb+kbHx4PSrMS/uqwe98OM ugt9D5NdU/PZuTXujnOOvOTwSM40ZmuX+KvCtzsKPYH+Y59mWx4qP/C6imwPRL9R b+EcvC0pzM7CL4dCgDG2/TBPueCTovgdiI3KLb9avc6pX28gApjVHY08Qv+Qgw6d swQXbpTb8XttDFOHdicp6HI9lLkUBJwOlq6iP1S2R481J3GvvoCWqk7ISXbia6Hc X9Trkkv2SUqJ0YbnK5Y9lO/DV74h5PjEx3yyUDTo2M7MjJkvqSo= =MLbr -----END PGP SIGNATURE----- --=-=-=-- --===============0663537696== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVs --===============0663537696==--