Re: [PATCH v3 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1()

From: Jani Nikula <jani.nikula@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@gmail.com>,
	intel-gfx@lists.freedesktop.org
Cc: Wayne Boyer <wayne.boyer@intel.com>,
	Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v3 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1()
Date: Fri, 14 Jul 2017 12:34:28 +0300	[thread overview]
Message-ID: <87bmonl5uj.fsf@nikula.org> (raw)
In-Reply-To: <149985393987.28319.1190106748589865284@mail.alporthouse.com>

On Wed, 12 Jul 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting Dhinakaran Pandiyan (2017-07-12 09:47:25)
>> On Tuesday, July 11, 2017 3:19:53 PM PDT Jim Bride wrote:
>> > On SKL+ there is a bit in SRD_CTL that software is not supposed to
>> > modify, but we currently clobber that bit when we enable PSR.  In
>> > order to preserve the value of that bit, go ahead and read SRD_CTL 
>> 
>> And which bit is that?
>
> I think we would all be happier with keeping the explicit construction
> (and a smaller patch) if we used
>
> 	val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_CTL_RSVD_MASK;

Agreed. Avoid read-modify-write as much as possible.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center
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