From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eric Anholt <eric.anholt@intel.com>
Subject: Re: [Patch 5/5] multiple ring buffer support,
 fix a irq enable logic for BSD
Date: Mon, 19 Apr 2010 10:25:11 -0700
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To: "Zou, Nanhai" <nanhai.zou@intel.com>, "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
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On Mon, 19 Apr 2010 09:34:42 +0800, "Zou, Nanhai" <nanhai.zou@intel.com> wr=
ote:
> >>-----Original Message-----
> >>From: Anholt, Eric
> >>Sent: 2010=E5=B9=B44=E6=9C=8813=E6=97=A5 2:29
> >>To: Zou, Nanhai; intel-gfx@lists.freedesktop.org
> >>Subject: Re: [Intel-gfx] [Patch 5/5] multiple ring buffer support, fix =
a irq
> >>enable logic for BSD
> >>
> >>On Wed, 7 Apr 2010 14:28:39 +0800, "Zou, Nanhai" <nanhai.zou@intel.com>=
 wrote:
> >>> Fix the BSD ring related IRQ logic on Ironlake.
> >>> Without this patch, we sometimes see IRQ lost
> >>> When playing H.264 content.
> >>
> >>This patch looks crazy.  Why do we need to do this?  How did you come up
> >>with it?  What prevents races between IIR clear and IER or IMR enable (=
if
> >>that's what the IIR clear is about).
> >>
>=20
> Yes, it looks a little strange.=20
> However HW spec from VCG do says IIR should be cleared before enable and =
disable interrupt.
> We thought this patch fixed the interrupt lost issue seen when playing mo=
vie. But now we found it just make the issue much harder to reproduce, so i=
gnore this patch until we found a real fix.

Before enable, sure, that makes sense -- otherwise you'd trigger an
interrupt right away when you know you don't need it.  But we do
unmasking, not enabling.

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