Re: [PATCH v5 3/7] KVM: arm64: Top up stage-2 memcache for dirty logging faults

[Marc Zyngier <maz@kernel.org>]

On Fri, 17 Jul 2026 15:17:00 +0100,
Fuad Tabba <fuad.tabba@linux.dev> wrote:
> 
> On Fri, 17 Jul 2026 at 14:15, <sashiko-bot@kernel.org> wrote:
> >
> > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> >
> > Pre-existing issues:
> > - [High] A malicious nested (L1) guest can crash the KVM host via a Break-Before-Make (BBM) violation that triggers a BUG_ON() due to an empty memory cache during a permission fault.
> 
> From my understanding of NV code, this looks like a real issue. I
> don't think it changes this patch, though: this one only widens the
> top-up for the dirty-logging case, and the path you describe is a
> non-logging permission fault. So, it would be a separate fix, a top up
> for nested permission faults too, the same way we already do for pKVM?
> 
>         if (!perm_fault || memslot_is_logging(s2fd->memslot) ||
>             is_protected_kvm_enabled() || s2fd->nested) {
> 
> If that's right, I'll send a separate fix later. Marc, what do you think?

I don't think this is correct. Yes, this papers over the guest being
buggy, but i don't think that's what we should really do.

Doing the same thing (changing the output size without a TLBI) on real
HW would result in a permission fault being signalled to EL2, and we
should model our SW MMU the same way.

I think the latent bug here is the way we always walk L1's S2 on S2
fault, irrespective of the fault type, and that feels wrong. This is
ignoring the fact that we already have a TLB (the shadow S2) for this
mapping, and rewalk anyway. Since we now find valid permissions, we
take it at face value and try to install this new translation (which
could point to a different OA, and even bigger problem).

So ideally we'd simply tell the guest to bugger off, but we need to
solve a few problems first:

- some permission faults are caused by the host rather than the guest
  (dirty logging, HAFDBS), and we need to treat those specially.

- we need to rebuild an ESR based on the content of our TLB, not L1's
  S2, which is not always easy to obtain (we have some limited TTL
  caching in the shadow S2, but that's not always reliable).

All of this strongly intersects with Wei-Lin's reverse map, and
Oliver's HAFDBS support.

Oliver?

	M.

-- 
Jazz isn't dead. It just smells funny.