From: Marc Zyngier <maz@kernel.org>
To: Bradley Morgan <include@grrlz.net>
Cc: Dev Jain <dev.jain@arm.com>, Oliver Upton <oupton@kernel.org>,
Fuad Tabba <tabba@google.com>, Joey Gouly <joey.gouly@arm.com>,
Steffen Eiden <seiden@linux.ibm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Quentin Perret <qperret@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4] KVM: arm64: Record whether pKVM stage 2 mapping is cacheable
Date: Sun, 05 Jul 2026 21:13:31 +0100 [thread overview]
Message-ID: <87cxx16vpw.wl-maz@kernel.org> (raw)
In-Reply-To: <8D464B64-27CF-4430-8F7F-9E21B77CE4D3@grrlz.net>
On Sun, 05 Jul 2026 20:29:20 +0100,
Bradley Morgan <include@grrlz.net> wrote:
>
> On July 5, 2026 8:27:34 PM GMT+01:00, Marc Zyngier <maz@kernel.org> wrote:
> >On Sun, 05 Jul 2026 15:08:58 +0100,
> >Dev Jain <dev.jain@arm.com> wrote:
> >>
> >>
> >>
> >> On 02/07/26 12:54 am, Bradley Morgan wrote:
> >> > pKVM keeps its own mapping list for stage 2 operations. Its flush path
> >> > uses that list directly, so it lost the PTE attribute check done by
> >the
> >> > generic stage 2 walker.
> >> >
> >> > Record whether a mapping is cacheable and skip cache maintenance for
> >> > mappings that are not cacheable.
> >> >
> >> > Fixes: e912efed485a ("KVM: arm64: Introduce the EL1 pKVM MMU")
> >>
> >> Is Fixes tag required? If I am reading correctly, Arm ARM says this:
> >>
> >> "For VA-based cache maintenance instructions, the instruction operates
> >on the
> >> caches regardless of the memory type and cacheability attributes marked
> >for
> >> the memory address in the VMSA translation table entries. This means
> >that
> >> the effects of the cache maintenance instructions can apply regardless
> >of:
> >> Whether the address accessed:
> >> Is Normal memory or Device memory.
> >> Has the Cacheable attribute or the Non-cacheable attribute."
> >>
> >> So nothing goes wrong if we do dcache clean for non-cacheable
> >> memory.
> >
> >Two things:
> >
> >- having to perform CMOs for something that is not *expected* to be
> > cacheable is both pointless and a contradiction of the intent
> >
> >- what you quote is about the nature of the *mapping*, and not the
> > memory that is being mapped. Cleaning a dirty cache line on an
> > unsuspecting MMIO endpoint is never going to end nicely. Just have a
> > try.
> >
> >My reading of all this is that a fix indeed is required, and therefore
> >a Fixes tag *must* be present.
> >
> > M.
> >
> >
>
>
> Well, fair enough.
>
> It's kind of two things.
>
> 1: A fix
> 2: a optimization
>
> I say it's a fix, because it's not fun, no.
>
> And I Also say it's a optimization because wasting cycles isn't a good
> idea, trust me.
This is getting tiresome. Really. And when it comes to wasting cycles,
you strike me as the expert here.
It's not an optimisation at all. If anything, the test is going to
cost cycles because there is statistically never a case that you map a
device with upstream pKVM.
If you call this an optimisation, I'll ask for numbers *proving* this
is actually one. Do you really want to get down that road?
M.
--
Jazz isn't dead. It just smells funny.
next prev parent reply other threads:[~2026-07-05 20:11 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 19:24 [PATCH v4] KVM: arm64: Record whether pKVM stage 2 mapping is cacheable Bradley Morgan
2026-07-02 8:59 ` Marc Zyngier
2026-07-02 11:18 ` Leonardo Bras
2026-07-02 14:52 ` Bradley Morgan
2026-07-02 15:13 ` Leonardo Bras
2026-07-02 15:34 ` Marc Zyngier
2026-07-03 16:59 ` Bradley Morgan
2026-07-05 14:08 ` Dev Jain
2026-07-05 14:12 ` Bradley Morgan
2026-07-05 19:27 ` Marc Zyngier
2026-07-05 19:29 ` Bradley Morgan
2026-07-05 20:13 ` Marc Zyngier [this message]
2026-07-05 20:17 ` Bradley Morgan
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