From: Jonathan Corbet <corbet@lwn.net>
To: gshahrouzi@gmail.com, linux-kernel@vger.kernel.org
Cc: trivial@kernel.org, skhan@linuxfoundation.org,
linux-kernel-mentees@lists.linuxfoundation.org,
linux-doc@vger.kernel.org
Subject: Re: [PATCH] Docs/arch/arm64: Fix spelling in amu.rst
Date: Tue, 04 Mar 2025 09:38:23 -0700 [thread overview]
Message-ID: <87cyeweoow.fsf@trenco.lwn.net> (raw)
In-Reply-To: <67bd05b5.c80a0220.205997.19df@mx.google.com>
gshahrouzi@gmail.com writes:
>>From 748db76c8e9f6e5906be0033dcdec9bb5749b303 Mon Sep 17 00:00:00 2001
> From: Gabriel <gshahrouzi@gmail.com>
> Date: Mon, 24 Feb 2025 18:09:26 -0500
> Subject: [PATCH] Docs/arch/arm64: Fix spelling in amu.rst
>
> Change though to through.
>
> Signed-off-by: Gabriel <gshahrouzi@gmail.com>
> ---
> Documentation/arch/arm64/amu.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/arch/arm64/amu.rst b/Documentation/arch/arm64/amu.rst
> index 01f2de2b0450..ac1b3f0e211d 100644
> --- a/Documentation/arch/arm64/amu.rst
> +++ b/Documentation/arch/arm64/amu.rst
> @@ -80,7 +80,7 @@ bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to
> EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers
> are not trapped in EL2/EL3.
>
> -The fixed counters of AMUv1 are accessible though the following system
> +The fixed counters of AMUv1 are accessible through the following system
> register definitions:
Applied, thanks.
jon
prev parent reply other threads:[~2025-03-04 16:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-24 23:50 [PATCH] Docs/arch/arm64: Fix spelling in amu.rst gshahrouzi
2025-03-04 16:38 ` Jonathan Corbet [this message]
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