From: Jani Nikula <jani.nikula@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/xe/dp: Enable DP tunneling
Date: Mon, 13 Jan 2025 18:38:34 +0200 [thread overview]
Message-ID: <87cygqis8l.fsf@intel.com> (raw)
In-Reply-To: <20250113154832.1004369-1-imre.deak@intel.com>
On Mon, 13 Jan 2025, Imre Deak <imre.deak@intel.com> wrote:
> Enable the DP tunneling functionality in the xe driver.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_tunnel.h | 5 +++--
> drivers/gpu/drm/xe/Kconfig | 14 ++++++++++++++
> drivers/gpu/drm/xe/Makefile | 3 +++
> 3 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> index e9314cf25a193..7a91b4945eb8d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_tunnel.h
> @@ -20,7 +20,8 @@ struct intel_dp;
> struct intel_encoder;
> struct intel_link_bw_limits;
>
> -#if IS_ENABLED(CONFIG_DRM_I915_DP_TUNNEL) && defined(I915)
> +#if (defined(CONFIG_DRM_I915_DP_TUNNEL) && defined(I915)) || \
> + (defined(CONFIG_DRM_XE_DP_TUNNEL) && !defined(I915))
Please retain IS_ENABLED for checking kconfig symbols.
> int intel_dp_tunnel_detect(struct intel_dp *intel_dp, struct drm_modeset_acquire_ctx *ctx);
> void intel_dp_tunnel_disconnect(struct intel_dp *intel_dp);
> @@ -127,6 +128,6 @@ intel_dp_tunnel_mgr_init(struct intel_display *display)
>
> static inline void intel_dp_tunnel_mgr_cleanup(struct intel_display *display) {}
>
> -#endif /* CONFIG_DRM_I915_DP_TUNNEL */
> +#endif /* CONFIG_DRM_I915_DP_TUNNEL || CONFIG_DRM_XE_DP_TUNNEL */
>
> #endif /* __INTEL_DP_TUNNEL_H__ */
> diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig
> index b51a2bde73e29..50cf80df51900 100644
> --- a/drivers/gpu/drm/xe/Kconfig
> +++ b/drivers/gpu/drm/xe/Kconfig
> @@ -59,6 +59,20 @@ config DRM_XE_DISPLAY
> help
> Disable this option only if you want to compile out display support.
>
> +config DRM_XE_DP_TUNNEL
> + bool "Enable DP tunnel support"
> + depends on DRM_XE
> + depends on USB4
> + select DRM_DISPLAY_DP_TUNNEL
> + default y
> + help
> + Choose this option to detect DP tunnels and enable the Bandwidth
> + Allocation mode for such tunnels. This allows using the maximum
> + resolution allowed by the link BW on all displays sharing the
> + link BW, for instance on a Thunderbolt link.
> +
> + If in doubt say "Y".
> +
I'm sort of wondering why we have this (and the i915 one) as
user-selectable config options at all. Is it ever reasonable for the
user to disable this if USB4 is enabled?
BR,
Jani.
> config DRM_XE_FORCE_PROBE
> string "Force probe xe for selected Intel hardware IDs"
> depends on DRM_XE
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 5c97ad6ed7385..81f63258a7e19 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -301,6 +301,9 @@ ifeq ($(CONFIG_DEBUG_FS),y)
> i915-display/intel_pipe_crc.o
> endif
>
> +xe-$(CONFIG_DRM_XE_DP_TUNNEL) += \
> + i915-display/intel_dp_tunnel.o
> +
> obj-$(CONFIG_DRM_XE) += xe.o
> obj-$(CONFIG_DRM_XE_KUNIT_TEST) += tests/
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-01-13 16:38 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-13 15:48 [PATCH] drm/xe/dp: Enable DP tunneling Imre Deak
2025-01-13 16:20 ` ✓ CI.Patch_applied: success for " Patchwork
2025-01-13 16:20 ` ✓ CI.checkpatch: " Patchwork
2025-01-13 16:21 ` ✓ CI.KUnit: " Patchwork
2025-01-13 16:38 ` Jani Nikula [this message]
2025-01-13 17:40 ` [PATCH] " Imre Deak
2025-01-16 20:38 ` Lucas De Marchi
2025-01-17 15:55 ` Imre Deak
2025-01-17 16:45 ` Lucas De Marchi
2025-01-21 15:28 ` Imre Deak
2025-01-13 16:39 ` ✓ CI.Build: success for " Patchwork
2025-01-13 16:41 ` ✓ CI.Hooks: " Patchwork
2025-01-13 16:43 ` ✓ CI.checksparse: " Patchwork
2025-01-13 18:53 ` ✗ Fi.CI.SPARSE: warning " Patchwork
2025-01-13 19:32 ` ✗ i915.CI.BAT: failure " Patchwork
2025-01-13 19:36 ` Patchwork
2025-01-13 19:36 ` Patchwork
2025-01-13 19:36 ` Patchwork
2025-01-13 19:36 ` Patchwork
2025-01-13 19:36 ` Patchwork
2025-01-14 12:28 ` [PATCH v2] " Imre Deak
2025-01-16 5:17 ` Kandpal, Suraj
2025-01-14 12:33 ` ✗ Xe.CI.Full: failure for " Patchwork
2025-01-14 13:23 ` ✓ CI.Patch_applied: success for drm/xe/dp: Enable DP tunneling (rev2) Patchwork
2025-01-14 13:24 ` ✓ CI.checkpatch: " Patchwork
2025-01-14 13:25 ` ✓ CI.KUnit: " Patchwork
2025-01-14 13:43 ` ✓ CI.Build: " Patchwork
2025-01-14 13:45 ` ✓ CI.Hooks: " Patchwork
2025-01-14 13:47 ` ✓ CI.checksparse: " Patchwork
2025-01-14 14:13 ` ✓ Xe.CI.BAT: " Patchwork
2025-01-14 15:16 ` ✗ Fi.CI.SPARSE: warning " Patchwork
2025-01-14 15:39 ` ✓ i915.CI.BAT: success " Patchwork
2025-01-14 17:54 ` ✗ Xe.CI.Full: failure " Patchwork
2025-01-16 19:07 ` Imre Deak
2025-01-15 10:28 ` ✗ i915.CI.Full: " Patchwork
2025-01-16 20:32 ` [PATCH] drm/xe/dp: Enable DP tunneling Lucas De Marchi
2025-01-17 13:43 ` Imre Deak
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87cygqis8l.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.