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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/16] drm/i915: Drop a few unwanted tabs from skl+ plane reg defines
Date: Mon, 13 May 2024 13:40:31 +0300	[thread overview]
Message-ID: <87cypqf10g.fsf@intel.com> (raw)
In-Reply-To: <20240510152329.24098-13-ville.syrjala@linux.intel.com>

On Fri, 10 May 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> A few extra tabs have snuck into the skl+ plane register bit
> definitions. Remove them.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/skl_universal_plane_regs.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> index 8ef9bd50d021..18dbe717ea21 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> @@ -199,17 +199,17 @@
>  
>  #define _PLANE_CUS_CTL_1_A			0x701c8
>  #define   PLANE_CUS_ENABLE			REG_BIT(31)
> -#define   PLANE_CUS_Y_PLANE_MASK			REG_BIT(30)
> +#define   PLANE_CUS_Y_PLANE_MASK		REG_BIT(30)
>  #define   PLANE_CUS_Y_PLANE_4_RKL		REG_FIELD_PREP(PLANE_CUS_Y_PLANE_MASK, 0)
>  #define   PLANE_CUS_Y_PLANE_5_RKL		REG_FIELD_PREP(PLANE_CUS_Y_PLANE_MASK, 1)
>  #define   PLANE_CUS_Y_PLANE_6_ICL		REG_FIELD_PREP(PLANE_CUS_Y_PLANE_MASK, 0)
>  #define   PLANE_CUS_Y_PLANE_7_ICL		REG_FIELD_PREP(PLANE_CUS_Y_PLANE_MASK, 1)
> -#define   PLANE_CUS_HPHASE_SIGN_NEGATIVE		REG_BIT(19)
> +#define   PLANE_CUS_HPHASE_SIGN_NEGATIVE	REG_BIT(19)
>  #define   PLANE_CUS_HPHASE_MASK			REG_GENMASK(17, 16)
>  #define   PLANE_CUS_HPHASE_0			REG_FIELD_PREP(PLANE_CUS_HPHASE_MASK, 0)
>  #define   PLANE_CUS_HPHASE_0_25			REG_FIELD_PREP(PLANE_CUS_HPHASE_MASK, 1)
>  #define   PLANE_CUS_HPHASE_0_5			REG_FIELD_PREP(PLANE_CUS_HPHASE_MASK, 2)
> -#define   PLANE_CUS_VPHASE_SIGN_NEGATIVE		REG_BIT(15)
> +#define   PLANE_CUS_VPHASE_SIGN_NEGATIVE	REG_BIT(15)
>  #define   PLANE_CUS_VPHASE_MASK			REG_GENMASK(13, 12)
>  #define   PLANE_CUS_VPHASE_0			REG_FIELD_PREP(PLANE_CUS_VPHASE_MASK, 0)
>  #define   PLANE_CUS_VPHASE_0_25			REG_FIELD_PREP(PLANE_CUS_VPHASE_MASK, 1)

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-05-13 10:40 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-10 15:23 [PATCH 00/16] drm/i915: skl+ plane register stuff Ville Syrjala
2024-05-10 15:23 ` [PATCH 01/16] drm/i915: Nuke _MMIO_PLANE_GAMC() Ville Syrjala
2024-05-13  9:50   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 02/16] drm/i915: Extract skl_universal_plane_regs.h Ville Syrjala
2024-05-13 10:07   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 03/16] drm/i915: Extract intel_cursor_regs.h Ville Syrjala
2024-05-13 10:10   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 04/16] drm/i915: Move skl+ wm/ddb registers to proper headers Ville Syrjala
2024-05-13 10:13   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 05/16] drm/i915/gvt: Use the proper PLANE_AUX_DIST() define Ville Syrjala
2024-05-13 10:21   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 06/16] drm/i915/gvt: Use the proper PLANE_AUX_OFFSET() define Ville Syrjala
2024-05-13 10:23   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 07/16] drm/i915/gvt: Use the full PLANE_KEY*() defines Ville Syrjala
2024-05-13 10:25   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 08/16] drm/i915/gvt: Use PLANE_CTL and PLANE_SURF defines Ville Syrjala
2024-05-13 10:30   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 09/16] drm/i915: Drop useless PLANE_FOO_3 register defines Ville Syrjala
2024-05-13 10:32   ` Jani Nikula
2024-05-13 16:58   ` [PATCH v2 " Ville Syrjala
2024-05-10 15:23 ` [PATCH 10/16] drm/i915: Shuffle the skl+ plane register definitions Ville Syrjala
2024-05-13 11:28   ` Jani Nikula
2024-05-13 16:13     ` Ville Syrjälä
2024-05-13 16:59   ` [PATCH v2 " Ville Syrjala
2024-05-13 20:30     ` Jani Nikula
2024-05-10 15:23 ` [PATCH 11/16] drm/i915: Use REG_BIT for PLANE_WM bits Ville Syrjala
2024-05-13 10:38   ` Jani Nikula
2024-05-13 16:59   ` [PATCH v2 " Ville Syrjala
2024-05-10 15:23 ` [PATCH 12/16] drm/i915: Drop a few unwanted tabs from skl+ plane reg defines Ville Syrjala
2024-05-13 10:40   ` Jani Nikula [this message]
2024-05-13 17:00   ` [PATCH v2 " Ville Syrjala
2024-05-10 15:23 ` [PATCH 13/16] drm/i915: Refactor skl+ plane register offset calculations Ville Syrjala
2024-05-13 17:00   ` [PATCH v2 " Ville Syrjala
2024-05-13 20:41     ` Jani Nikula
2024-05-13 20:43       ` Jani Nikula
2024-05-10 15:23 ` [PATCH 14/16] drm/i915: Extract skl_plane_{wm,ddb}_reg_val() Ville Syrjala
2024-05-13 20:43   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 15/16] drm/i915: Nuke skl_write_wm_level() and skl_ddb_entry_write() Ville Syrjala
2024-05-13 20:46   ` Jani Nikula
2024-05-10 15:23 ` [PATCH 16/16] drm/i915: Handle SKL+ WM/DDB registers next to all other plane registers Ville Syrjala
2024-05-13 20:52   ` Jani Nikula
2024-05-15 11:17     ` Ville Syrjälä
2024-05-10 16:28 ` ✓ Fi.CI.BAT: success for drm/i915: skl+ plane register stuff Patchwork
2024-05-11 20:02 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-13 18:39 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: skl+ plane register stuff (rev6) Patchwork
2024-05-13 18:39 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-13 18:55 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-14  2:01 ` ✗ Fi.CI.IGT: failure " Patchwork

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