From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 04/13] drm/i915: Don't warn about zero N/P in *_calc_dpll_params()
Date: Thu, 06 Jul 2023 11:17:14 +0300 [thread overview]
Message-ID: <87cz15zc6t.fsf@intel.com> (raw)
In-Reply-To: <20230705202122.17915-5-ville.syrjala@linux.intel.com>
On Wed, 05 Jul 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Allow *_calc_dpll_params() to be called even if the N/P dividers
> are zero without warning. We'll want to call these to make sure the
> derived values are fully computed, but not all users (VLV DSI in
> particular) don't even enable the DPLL and thus the dividers will
> be left at zero.
>
> It could also be possible that the BIOS has misprogrammed the DPLL
> (IIRC happened with some SNB machines with 4k+ displays) and thus
> we'll currently generate a lot of dmesg spew. Better be silent and
> just let the normal state checker/etc. deal with any driver bugs.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dpll.c | 37 ++++++++++++-----------
> 1 file changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 999badfe2906..71bfeea4cef2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -314,10 +314,11 @@ int pnv_calc_dpll_params(int refclk, struct dpll *clock)
> {
> clock->m = clock->m2 + 2;
> clock->p = clock->p1 * clock->p2;
> - if (WARN_ON(clock->n == 0 || clock->p == 0))
> - return 0;
> - clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
> - clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
> +
> + clock->vco = clock->n == 0 ? 0 :
> + DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
> + clock->dot = clock->p == 0 ? 0 :
> + DIV_ROUND_CLOSEST(clock->vco, clock->p);
>
> return clock->dot;
> }
> @@ -331,10 +332,11 @@ int i9xx_calc_dpll_params(int refclk, struct dpll *clock)
> {
> clock->m = i9xx_dpll_compute_m(clock);
> clock->p = clock->p1 * clock->p2;
> - if (WARN_ON(clock->n + 2 == 0 || clock->p == 0))
> - return 0;
> - clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);
> - clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
> +
> + clock->vco = clock->n + 2 == 0 ? 0 :
> + DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);
> + clock->dot = clock->p == 0 ? 0 :
> + DIV_ROUND_CLOSEST(clock->vco, clock->p);
>
> return clock->dot;
> }
> @@ -343,10 +345,11 @@ int vlv_calc_dpll_params(int refclk, struct dpll *clock)
> {
> clock->m = clock->m1 * clock->m2;
> clock->p = clock->p1 * clock->p2 * 5;
> - if (WARN_ON(clock->n == 0 || clock->p == 0))
> - return 0;
> - clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
> - clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
> +
> + clock->vco = clock->n == 0 ? 0 :
> + DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
> + clock->dot = clock->p == 0 ? 0 :
> + DIV_ROUND_CLOSEST(clock->vco, clock->p);
>
> return clock->dot;
> }
> @@ -355,11 +358,11 @@ int chv_calc_dpll_params(int refclk, struct dpll *clock)
> {
> clock->m = clock->m1 * clock->m2;
> clock->p = clock->p1 * clock->p2 * 5;
> - if (WARN_ON(clock->n == 0 || clock->p == 0))
> - return 0;
> - clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m),
> - clock->n << 22);
> - clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
> +
> + clock->vco = clock->n == 0 ? 0 :
> + DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), clock->n << 22);
> + clock->dot = clock->p == 0 ? 0 :
> + DIV_ROUND_CLOSEST(clock->vco, clock->p);
>
> return clock->dot;
> }
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-07-06 8:17 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-05 20:21 [Intel-gfx] [PATCH 00/13] drm/i915/sdvo: DDC rework and fixes Ville Syrjala
2023-07-05 20:21 ` [Intel-gfx] [PATCH 01/13] drm/i915/sdvo: Issue SetTargetOutput prior ot GetAttachedDisplays Ville Syrjala
2023-07-06 7:20 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 02/13] drm/i915/sdvo: Protect macro args Ville Syrjala
2023-07-06 7:20 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 03/13] drm/i915/sdvo: s/sdvo_inputs_mask/sdvo_num_inputs/ Ville Syrjala
2023-07-06 7:24 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 04/13] drm/i915: Don't warn about zero N/P in *_calc_dpll_params() Ville Syrjala
2023-07-06 8:17 ` Jani Nikula [this message]
2023-07-05 20:21 ` [Intel-gfx] [PATCH 05/13] drm/i915: Fully populate crtc_state->dpll Ville Syrjala
2023-07-06 8:41 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 06/13] drm/i915/sdvo: Pick the TV dotclock from adjusted_mode Ville Syrjala
2023-07-06 8:22 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 07/13] drm/i915/sdvo: Fail gracefully if the TV dotclock is out of range Ville Syrjala
2023-07-06 8:22 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 08/13] drm/i915/sdvo: Nuke attached_output tracking Ville Syrjala
2023-07-06 8:24 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 09/13] drm/i915/sdvo: Initialize the encoder ealier Ville Syrjala
2023-07-06 8:28 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 10/13] drm/i915/sdvo: Nuke the duplicate sdvo->port Ville Syrjala
2023-07-06 8:29 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 11/13] drm/i915/sdvo: Get rid of the per-connector i2c symlink Ville Syrjala
2023-07-06 8:30 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 12/13] drm/i915/sdvo: Rework DDC bus handling Ville Syrjala
2023-07-06 8:38 ` Jani Nikula
2023-07-05 20:21 ` [Intel-gfx] [PATCH 13/13] drm/i915/sdvo: Print out the i2c pin and slave address Ville Syrjala
2023-07-06 8:38 ` Jani Nikula
2023-07-05 21:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/sdvo: DDC rework and fixes Patchwork
2023-07-05 21:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-06 1:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-07-06 8:45 ` [Intel-gfx] [PATCH 00/13] " Jani Nikula
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