From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD7BDC433E6 for ; Tue, 22 Dec 2020 11:31:48 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 818982312D for ; Tue, 22 Dec 2020 11:31:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 818982312D Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:In-Reply-To:Subject:To: From:References:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=0jMe8fFYnDSTm3L6+RMhc02MfpZkOrHeWrV4mMV0J+8=; b=fxDghijRLMjRbsOMx4ii+mQmB vltVuRWUrOrg7UC+JWGtzHEoMTWqbEGb0hbexdHr8nTEuMF7XKRCmJm1YFBo3MIf24XhbyRZVbaic lysSuLBsm5OaPDZADlES+/3RYJr/Js2s7UcC/Ll32bPTrtsA+TmRMFqU8u2RDVz6HC8IKdjtkBWVn 4XXJ+LUcvmavl8U6csFqUTzgp8Knv5K3/TQwgKjIW3VoAFiGvcVAixr9aCUybnQP9dhpw0MMu9UhZ get8oQk2+NP+86FF64RfgQd9IPAFwcu4FHHW2+wOqZliJhKm2TYntrGIBVFOppeksUahCSyYDptpp PET5ey1LA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1krfrr-0003kJ-BJ; Tue, 22 Dec 2020 11:30:15 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1krfrp-0003jN-3T for linux-arm-kernel@lists.infradead.org; Tue, 22 Dec 2020 11:30:14 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1608636613; x=1640172613; h=references:from:to:cc:subject:in-reply-to:date: message-id:mime-version:content-transfer-encoding; bh=g8yIvISp9TCwCdGa24nm2oJMHerDtBdiqZ7iBjlRmMY=; b=iYmG3JyfOcbmN5GUi/oCFL3Uw2qFzniNhFMJcR59BviOuekRHMM+WI1X XSk2Sbx/cB+lboeivBcHS26V7Z+DGhwXbMYVr5qXnQyPFTCjbuRwxySDX CocBW5MUZmHJNakTqXvr356UxbjLxsyaYP3tgRtizmUU9wqY6fJEnISQP 0rnXPPMOKYCkuMZopeVrdobsrZD+pDCKcHUswPfzDIiBKGp8OqYoj8126 /bIg+/3rrpwnWPXKITGCSmxjX5EadyyzRsWcK8bFe3NXzakY98B4175JO ip40/0meYqzOAwdXWgSK2RHw7djcisnNYGurzq9LYBvzGAjrGF30cVbvo g==; IronPort-SDR: henkgIWC94c14Qhr1XSRvgQJofrXY0bmSXcBAwSZ9jG/0cYA0nSKBm07L103CL06BEZx+awfdx D4Kt53F2rfZhbE7ZeNvqIK46SnqhcEfy7Pf0ne/YQkIMRKlWV6RUVYiYnqo7mo6kB13Lpe4nRv 3jM85fay4oZGvZ38LsdIsobM5LNMoWWsD+96MvieMyPQD7iviPP+DXvveSIVqn1Mt+NT4kt/Do m/KEX9fvtA+ovxI4dWOgkhuO96hGLhnXaWRCuuIJz6J2kALOw6sU48kYoJi4hrkxEefZcdrC5X XTc= X-IronPort-AV: E=Sophos;i="5.78,438,1599548400"; d="scan'208";a="38266841" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Dec 2020 04:30:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 22 Dec 2020 04:30:07 -0700 Received: from soft-dev10.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3 via Frontend Transport; Tue, 22 Dec 2020 04:30:04 -0700 References: <20201217075134.919699-1-steen.hegelund@microchip.com> <6645f038-7101-67e4-0843-35125f74597a@gmail.com> User-agent: mu4e 1.2.0; emacs 26.3 From: Lars Povlsen To: Florian Fainelli Subject: Re: [RFC PATCH v2 0/8] Adding the Sparx5 Switch Driver In-Reply-To: <6645f038-7101-67e4-0843-35125f74597a@gmail.com> Date: Tue, 22 Dec 2020 12:29:55 +0100 Message-ID: <87czz2oz7w.fsf@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201222_063013_360109_50D6B8D6 X-CRM114-Status: GOOD ( 14.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Alexandre Belloni , linux-kernel@vger.kernel.org, Arnd Bergmann , Bjarni Jonasson , Madalin Bucur , netdev@vger.kernel.org, Steen Hegelund , Russell King , Microchip Linux Driver Support , Torkil.Oelgaard@microchip.com, linux-arm-kernel@lists.infradead.org, Ioannis.Kotleas@microchip.com, Mark Einon , Jakub Kicinski , Masahiro Yamada , "David S. Miller" , Lars Povlsen Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CkZsb3JpYW4gRmFpbmVsbGkgd3JpdGVzOgoKPiBPbiAxMi8xNi8yMDIwIDExOjUxIFBNLCBTdGVl biBIZWdlbHVuZCB3cm90ZToKPj4gVGhpcyBzZXJpZXMgcHJvdmlkZXMgdGhlIE1pY3JvY2hpcCBT cGFyeDUgU3dpdGNoIERyaXZlcgo+Pgo+PiBUaGUgU3Bhcng1IENhcnJpZXIgRXRoZXJuZXQgYW5k IEluZHVzdHJpYWwgc3dpdGNoIGZhbWlseSBkZWxpdmVycyA2NAo+PiBFdGhlcm5ldCBwb3J0cyBh bmQgdXAgdG8gMjAwIEdicHMgb2Ygc3dpdGNoaW5nIGJhbmR3aWR0aC4KPj4KPj4gSXQgcHJvdmlk ZXMgYSByaWNoIHNldCBvZiBFdGhlcm5ldCBzd2l0Y2hpbmcgZmVhdHVyZXMgc3VjaCBhcyBoaWVy YXJjaGljYWwKPj4gUW9TLCBoYXJkd2FyZS1iYXNlZCBPQU0gIGFuZCBzZXJ2aWNlIGFjdGl2YXRp b24gdGVzdGluZywgcHJvdGVjdGlvbgo+PiBzd2l0Y2hpbmcsIElFRUUgMTU4OCwgYW5kIFN5bmNo cm9ub3VzIEV0aGVybmV0Lgo+Pgo+PiBVc2luZyBwcm92aWRlciBicmlkZ2luZyAoUS1pbi1RKSBh bmQgTVBMUy9NUExTLVRQIHRlY2hub2xvZ3ksIGl0IGRlbGl2ZXJzCj4+IE1FRiBDRQo+PiAyLjAg RXRoZXJuZXQgdmlydHVhbCBjb25uZWN0aW9ucyAoRVZDcykgYW5kIGZlYXR1cmVzIGFkdmFuY2Vk IFRDQU0KPj4gICBjbGFzc2lmaWNhdGlvbiBpbiBib3RoIGluZ3Jlc3MgYW5kIGVncmVzcy4KPj4K Pj4gUGVyLUVWQyBmZWF0dXJlcyBpbmNsdWRlIGFkdmFuY2VkIEwzLWF3YXJlIGNsYXNzaWZpY2F0 aW9uLCBhIHJpY2ggc2V0IG9mCj4+IHN0YXRpc3RpY3MsIE9BTSBmb3IgZW5kLXRvLWVuZCBwZXJm b3JtYW5jZSBtb25pdG9yaW5nLCBhbmQgZHVhbC1yYXRlCj4+IHBvbGljaW5nIGFuZCBzaGFwaW5n Lgo+Pgo+PiBUaW1lIHNlbnNpdGl2ZSBuZXR3b3JraW5nIChUU04pIGlzIHN1cHBvcnRlZCB0aHJv dWdoIGEgY29tcHJlaGVuc2l2ZSBzZXQgb2YKPj4gZmVhdHVyZXMgaW5jbHVkaW5nIGZyYW1lIHBy ZWVtcHRpb24sIGN1dC10aHJvdWdoLCBmcmFtZSByZXBsaWNhdGlvbiBhbmQKPj4gZWxpbWluYXRp b24gZm9yIHJlbGlhYmlsaXR5LCBlbmhhbmNlZCBzY2hlZHVsaW5nOiBjcmVkaXQtYmFzZWQgc2hh cGluZywKPj4gdGltZS1hd2FyZSBzaGFwaW5nLCBjeWNsaWMgcXVldWluZywgYW5kIGZvcndhcmRp bmcsIGFuZCBwZXItc3RyZWFtIHBvbGljaW5nCj4+IGFuZCBmaWx0ZXJpbmcuCj4+Cj4+IFRvZ2V0 aGVyIHdpdGggSUVFRSAxNTg4IGFuZCBJRUVFIDgwMi4xQVMgc3VwcG9ydCwgdGhpcyBndWFyYW50 ZWVzCj4+IGxvdy1sYXRlbmN5IGRldGVybWluaXN0aWMgbmV0d29ya2luZyBmb3IgRnJvbnRoYXVs LCBDYXJyaWVyLCBhbmQgSW5kdXN0cmlhbAo+PiBFdGhlcm5ldC4KPj4KPj4gVGhlIFNwYXJ4NSBz d2l0Y2ggZmFtaWx5IGNvbnNpc3RzIG9mIGZvbGxvd2luZyBTS1VzOgo+Pgo+PiAtIFZTQzc1NDYg U3Bhcng1LTY0IHVwIHRvIDY0IEdicHMgb2YgYmFuZHdpZHRoIHdpdGggdGhlIGZvbGxvd2luZyBw cmltYXJ5Cj4+ICAgcG9ydCBjb25maWd1cmF0aW9uczoKPj4gICAtIDYgKjEwRwo+PiAgIC0gMTYg KiAyLjVHICsgMiAqIDEwRwo+PiAgIC0gMjQgKiAxRyArIDQgKiAxMEcKPj4KPj4gLSBWU0M3NTQ5 IFNwYXJ4NS05MCB1cCB0byA5MCBHYnBzIG9mIGJhbmR3aWR0aCB3aXRoIHRoZSBmb2xsb3dpbmcg cHJpbWFyeQo+PiAgIHBvcnQgY29uZmlndXJhdGlvbnM6Cj4+ICAgLSA5ICogMTBHCj4+ICAgLSAx NiAqIDIuNUcgKyA0ICogMTBHCj4+ICAgLSA0OCAqIDFHICsgNCAqIDEwRwo+Pgo+PiAtIFZTQzc1 NTIgU3Bhcng1LTEyOCB1cCB0byAxMjggR2JwcyBvZiBiYW5kd2lkdGggd2l0aCB0aGUgZm9sbG93 aW5nIHByaW1hcnkKPj4gICBwb3J0IGNvbmZpZ3VyYXRpb25zOgo+PiAgIC0gMTIgKiAxMEcKPj4g ICAtIDE2ICogMi41RyArIDggKiAxMEcKPj4gICAtIDQ4ICogMUcgKyA4ICogMTBHCj4+Cj4+IC0g VlNDNzU1NiBTcGFyeDUtMTYwIHVwIHRvIDE2MCBHYnBzIG9mIGJhbmR3aWR0aCB3aXRoIHRoZSBm b2xsb3dpbmcgcHJpbWFyeQo+PiAgIHBvcnQgY29uZmlndXJhdGlvbnM6Cj4+ICAgLSAxNiAqIDEw Rwo+PiAgIC0gMTAgKiAxMEcgKyAyICogMjVHCj4+ICAgLSAxNiAqIDIuNUcgKyAxMCAqIDEwRwo+ PiAgIC0gNDggKiAxRyArIDEwICogMTBHCj4+Cj4+IC0gVlNDNzU1OCBTcGFyeDUtMjAwIHVwIHRv IDIwMCBHYnBzIG9mIGJhbmR3aWR0aCB3aXRoIHRoZSBmb2xsb3dpbmcgcHJpbWFyeQo+PiAgIHBv cnQgY29uZmlndXJhdGlvbnM6Cj4+ICAgLSAyMCAqIDEwRwo+PiAgIC0gOCAqIDI1Rwo+Pgo+PiBJ biBhZGRpdGlvbiwgdGhlIGRldmljZSBzdXBwb3J0cyBvbmUgMTAvMTAwLzEwMDAvMjUwMC81MDAw IE1icHMKPj4gU0dNSUkvU2VyRGVzIG5vZGUgcHJvY2Vzc29yIGludGVyZmFjZSAoTlBJKSBFdGhl cm5ldCBwb3J0Lgo+Pgo+PiBUaGUgU3Bhcng1IHN1cHBvcnQgaXMgZGV2ZWxvcGVkIG9uIHRoZSBQ Q0IxMzQgYW5kIFBDQjEzNSBldmFsdWF0aW9uIGJvYXJkcy4KPj4KPj4gLSBQQ0IxMzQgbWFpbiBu ZXR3b3JraW5nIGZlYXR1cmVzOgo+PiAgIC0gMTJ4IFNGUCsgZnJvbnQgMTBHIG1vZHVsZSBzbG90 cyAoY29ubmVjdGVkIHRvIFNwYXJ4NSB0aHJvdWdoIFNGSSkuCj4+ICAgLSA4eCBTRlAyOCBmcm9u dCAyNUcgbW9kdWxlIHNsb3RzIChjb25uZWN0ZWQgdG8gU3Bhcng1IHRocm91Z2ggU0ZJIGhpZ2gK Pj4gICAgIHNwZWVkKS4KPj4gICAtIE9wdGlvbmFsLCBvbmUgYWRkaXRpb25hbCAxMC8xMDAvMTAw MEJBU0UtVCAoUko0NSkgRXRoZXJuZXQgcG9ydAo+PiAgICAgKG9uLWJvYXJkIFZTQzgyMTEgUEhZ IGNvbm5lY3RlZCB0byBTcGFyeDUgdGhyb3VnaCBTR01JSSkuCj4+Cj4+IC0gUENCMTM1IG1haW4g bmV0d29ya2luZyBmZWF0dXJlczoKPj4gICAtIDQ4eDFHICgxMC8xMDAvMTAwME0pIFJKNDUgZnJv bnQgcG9ydHMgdXNpbmcgMTJ4VlNDODUxNCBRdWFkUEhZ4oCZcyBlYWNoCj4+ICAgICBjb25uZWN0 ZWQgdG8gVlNDNzU1OCB0aHJvdWdoIFFTR01JSS4KPj4gICAtIDR4MTBHICgxRy8yLjVHLzVHLzEw RykgUko0NSBmcm9udCBwb3J0cyB1c2luZyB0aGUgQVFSNDA3IDEwRyBRdWFkUEhZCj4+ICAgICBl YWNoIHBvcnQgY29ubmVjdHMgdG8gVlNDNzU1OCB0aHJvdWdoIFNGSS4KPj4gICAtIDR4IFNGUDI4 IDI1RyBtb2R1bGUgc2xvdHMgb24gYmFjayBjb25uZWN0ZWQgdG8gVlNDNzU1OCB0aHJvdWdoIFNG SSBoaWdoCj4+ICAgICBzcGVlZC4KPj4gICAtIE9wdGlvbmFsLCBvbmUgYWRkaXRpb25hbCAxRyAo MTAvMTAwLzEwMDBNKSBSSjQ1IHBvcnQgdXNpbmcgYW4gb24tYm9hcmQKPj4gICAgIFZTQzgyMTEg UEhZLCB3aGljaCBjYW4gYmUgY29ubmVjdGVkIHRvIFZTQzc1NTggTlBJIHBvcnQgdGhyb3VnaCBT R01JSQo+PiAgICAgdXNpbmcgYSBsb29wYmFjayBhZGQtb24gUENCKQo+Pgo+PiBUaGlzIHNlcmll cyBwcm92aWRlcyBzdXBwb3J0IGZvcjoKPj4gICAtIFNGUHMgYW5kIERBQyBjYWJsZXMgdmlhIFBI WUxJTksgd2l0aCBhIG51bWJlciBvZiA1RywgMTBHIGFuZCAyNUcKPj4gICAgIGRldmljZXMgYW5k IG1lZGlhIHR5cGVzLgo+PiAgIC0gUG9ydCBtb2R1bGUgY29uZmlndXJhdGlvbiBmb3IgMTBNIHRv IDI1RyBzcGVlZHMgd2l0aCBTR01JSSwgUVNHTUlJLAo+PiAgICAgMTAwMEJBU0VYLCAyNTAwQkFT RVggYW5kIDEwR0JBU0VSIGFzIGFwcHJvcHJpYXRlIGZvciB0aGVzZSBtb2Rlcy4KPj4gICAtIFNl ckRlcyBjb25maWd1cmF0aW9uIHZpYSB0aGUgU3Bhcng1IFNlckRlcyBkcml2ZXIgKHNlZSBiZWxv dykuCj4+ICAgLSBIb3N0IG1vZGUgcHJvdmlkaW5nIHJlZ2lzdGVyIGJhc2VkIGluamVjdGlvbiBh bmQgZXh0cmFjdGlvbi4KPj4gICAtIFN3aXRjaCBtb2RlIHByb3ZpZGluZyBNQUMvVkxBTiB0YWJs ZSBsZWFybmluZyBhbmQgTGF5ZXIyIHN3aXRjaGluZwo+PiAgICAgb2ZmbG9hZGVkIHRvIHRoZSBT cGFyeDUgc3dpdGNoLgo+PiAgIC0gU1RQIHN0YXRlLCBWTEFOIHN1cHBvcnQsIGhvc3QvYnJpZGdl IHBvcnQgbW9kZSwgRm9yd2FyZGluZyBEQiwgYW5kCj4+ICAgICBjb25maWd1cmF0aW9uIGFuZCBz dGF0aXN0aWNzIHZpYSBldGh0b29sLgo+Pgo+PiBNb3JlIHN1cHBvcnQgd2lsbCBiZSBhZGRlZCBh dCBhIGxhdGVyIHN0YWdlLgo+Pgo+PiBUaGUgU3Bhcng1IFN3aXRjaCBjaGlwIHJlZ2lzdGVyIG1v ZGVsIGNhbiBiZSBicm93c2VkIGhlcmU6Cj4+IExpbms6IGh0dHBzOi8vbWljcm9jaGlwLXVuZy5n aXRodWIuaW8vc3BhcngtNV9yZWdpbmZvL3JlZ2luZm9fc3BhcngtNS5odG1sCj4KPiBPdXQgb2Yg Y3VyaW9zaXR5LCB3aGF0IHRvb2wgd2FzIHVzZWQgdG8gZ2VuZXJhdGUgdGhlIHJlZ2lzdGVyCj4g aW5mb3JtYXRpb24gcGFnZT8gSXQgbG9va3MgcmVhbGx5IG5lYXQgYW5kIHdlbGwgb3JnYW5pemVk LgoKRmxvcmlhbiwKCkl0IGlzIGFuIGluLWhvdXNlIHRvb2wuIFRoZSBpbnB1dCBkYXRhIGlzIGlu IGEgcHJvcHJpZXRhcnkgWE1MLWxpa2UKZm9ybWF0LgoKV2UncmUgcGxlYXNlZCB0aGF0IHlvdSBs aWtlIGl0LCB3ZSBkbyB0b28uIFdlIGFyZSBhbHNvIHBsZWFzZWQgdGhhdApiZWluZyBhIE1pY3Jv Y2hpcCBlbnRpdHksIHdlIGNhbiBhY3R1YWxseSBtYWtlIHRoaXMga2luZCBvZiBpbmZvcm1hdGlv bgpwdWJsaWMuCgpJJ2xsIHBhc3MgeW91ciBwcmFpc2Ugb24uCgotLS1MYXJzCgotLQpMYXJzIFBv dmxzZW4sCk1pY3JvY2hpcAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBs aXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlz dGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 419F0C433E0 for ; Tue, 22 Dec 2020 11:31:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2CF52312E for ; Tue, 22 Dec 2020 11:31:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726791AbgLVLbZ (ORCPT ); Tue, 22 Dec 2020 06:31:25 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:5395 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726016AbgLVLbY (ORCPT ); Tue, 22 Dec 2020 06:31:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1608636684; x=1640172684; h=references:from:to:cc:subject:in-reply-to:date: message-id:mime-version:content-transfer-encoding; bh=g8yIvISp9TCwCdGa24nm2oJMHerDtBdiqZ7iBjlRmMY=; b=K8mDpOlQDLkURC/RKfvNtZx8YWkjg8mpWH688VHhY492wV2eC8MeBNuT HNPcCvdz8+tE03RwC70+IUpdFDZ0garo5T9ppHTrS5wS6qRdSNO8+djOy RIk8CFBn+BW/g0S8LxEWolclCUy2XOMw0DcG0szOPSC+WwXVw5dycR6YR p+tofN4yPntr9AyIj4HybTVo8/tw25HpR8kCSvwOouvsG5UhfH3XrCVzc SOu8QQi1CxRpK8Yc0l6R0kOuSyIcQaLXeTCn9paI3jb60iQU/Upu69D8a LMhGRZLvbj3+cc7EwrtOJRYAxknT3oT9tL1fSeWk4pOHx1ghA7MYyhLka A==; IronPort-SDR: henkgIWC94c14Qhr1XSRvgQJofrXY0bmSXcBAwSZ9jG/0cYA0nSKBm07L103CL06BEZx+awfdx D4Kt53F2rfZhbE7ZeNvqIK46SnqhcEfy7Pf0ne/YQkIMRKlWV6RUVYiYnqo7mo6kB13Lpe4nRv 3jM85fay4oZGvZ38LsdIsobM5LNMoWWsD+96MvieMyPQD7iviPP+DXvveSIVqn1Mt+NT4kt/Do m/KEX9fvtA+ovxI4dWOgkhuO96hGLhnXaWRCuuIJz6J2kALOw6sU48kYoJi4hrkxEefZcdrC5X XTc= X-IronPort-AV: E=Sophos;i="5.78,438,1599548400"; d="scan'208";a="38266841" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Dec 2020 04:30:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 22 Dec 2020 04:30:07 -0700 Received: from soft-dev10.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3 via Frontend Transport; Tue, 22 Dec 2020 04:30:04 -0700 References: <20201217075134.919699-1-steen.hegelund@microchip.com> <6645f038-7101-67e4-0843-35125f74597a@gmail.com> User-agent: mu4e 1.2.0; emacs 26.3 From: Lars Povlsen To: Florian Fainelli CC: Steen Hegelund , "David S. Miller" , Jakub Kicinski , Andrew Lunn , Russell King , Lars Povlsen , Bjarni Jonasson , Microchip Linux Driver Support , Alexandre Belloni , Madalin Bucur , Nicolas Ferre , Mark Einon , Masahiro Yamada , Arnd Bergmann , , , , , Subject: Re: [RFC PATCH v2 0/8] Adding the Sparx5 Switch Driver In-Reply-To: <6645f038-7101-67e4-0843-35125f74597a@gmail.com> Date: Tue, 22 Dec 2020 12:29:55 +0100 Message-ID: <87czz2oz7w.fsf@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Florian Fainelli writes: > On 12/16/2020 11:51 PM, Steen Hegelund wrote: >> This series provides the Microchip Sparx5 Switch Driver >> >> The Sparx5 Carrier Ethernet and Industrial switch family delivers 64 >> Ethernet ports and up to 200 Gbps of switching bandwidth. >> >> It provides a rich set of Ethernet switching features such as hierarchic= al >> QoS, hardware-based OAM and service activation testing, protection >> switching, IEEE 1588, and Synchronous Ethernet. >> >> Using provider bridging (Q-in-Q) and MPLS/MPLS-TP technology, it delivers >> MEF CE >> 2.0 Ethernet virtual connections (EVCs) and features advanced TCAM >> classification in both ingress and egress. >> >> Per-EVC features include advanced L3-aware classification, a rich set of >> statistics, OAM for end-to-end performance monitoring, and dual-rate >> policing and shaping. >> >> Time sensitive networking (TSN) is supported through a comprehensive set= of >> features including frame preemption, cut-through, frame replication and >> elimination for reliability, enhanced scheduling: credit-based shaping, >> time-aware shaping, cyclic queuing, and forwarding, and per-stream polic= ing >> and filtering. >> >> Together with IEEE 1588 and IEEE 802.1AS support, this guarantees >> low-latency deterministic networking for Fronthaul, Carrier, and Industr= ial >> Ethernet. >> >> The Sparx5 switch family consists of following SKUs: >> >> - VSC7546 Sparx5-64 up to 64 Gbps of bandwidth with the following primary >> port configurations: >> - 6 *10G >> - 16 * 2.5G + 2 * 10G >> - 24 * 1G + 4 * 10G >> >> - VSC7549 Sparx5-90 up to 90 Gbps of bandwidth with the following primary >> port configurations: >> - 9 * 10G >> - 16 * 2.5G + 4 * 10G >> - 48 * 1G + 4 * 10G >> >> - VSC7552 Sparx5-128 up to 128 Gbps of bandwidth with the following prim= ary >> port configurations: >> - 12 * 10G >> - 16 * 2.5G + 8 * 10G >> - 48 * 1G + 8 * 10G >> >> - VSC7556 Sparx5-160 up to 160 Gbps of bandwidth with the following prim= ary >> port configurations: >> - 16 * 10G >> - 10 * 10G + 2 * 25G >> - 16 * 2.5G + 10 * 10G >> - 48 * 1G + 10 * 10G >> >> - VSC7558 Sparx5-200 up to 200 Gbps of bandwidth with the following prim= ary >> port configurations: >> - 20 * 10G >> - 8 * 25G >> >> In addition, the device supports one 10/100/1000/2500/5000 Mbps >> SGMII/SerDes node processor interface (NPI) Ethernet port. >> >> The Sparx5 support is developed on the PCB134 and PCB135 evaluation boar= ds. >> >> - PCB134 main networking features: >> - 12x SFP+ front 10G module slots (connected to Sparx5 through SFI). >> - 8x SFP28 front 25G module slots (connected to Sparx5 through SFI high >> speed). >> - Optional, one additional 10/100/1000BASE-T (RJ45) Ethernet port >> (on-board VSC8211 PHY connected to Sparx5 through SGMII). >> >> - PCB135 main networking features: >> - 48x1G (10/100/1000M) RJ45 front ports using 12xVSC8514 QuadPHY=E2=80= =99s each >> connected to VSC7558 through QSGMII. >> - 4x10G (1G/2.5G/5G/10G) RJ45 front ports using the AQR407 10G QuadPHY >> each port connects to VSC7558 through SFI. >> - 4x SFP28 25G module slots on back connected to VSC7558 through SFI h= igh >> speed. >> - Optional, one additional 1G (10/100/1000M) RJ45 port using an on-boa= rd >> VSC8211 PHY, which can be connected to VSC7558 NPI port through SGMII >> using a loopback add-on PCB) >> >> This series provides support for: >> - SFPs and DAC cables via PHYLINK with a number of 5G, 10G and 25G >> devices and media types. >> - Port module configuration for 10M to 25G speeds with SGMII, QSGMII, >> 1000BASEX, 2500BASEX and 10GBASER as appropriate for these modes. >> - SerDes configuration via the Sparx5 SerDes driver (see below). >> - Host mode providing register based injection and extraction. >> - Switch mode providing MAC/VLAN table learning and Layer2 switching >> offloaded to the Sparx5 switch. >> - STP state, VLAN support, host/bridge port mode, Forwarding DB, and >> configuration and statistics via ethtool. >> >> More support will be added at a later stage. >> >> The Sparx5 Switch chip register model can be browsed here: >> Link: https://microchip-ung.github.io/sparx-5_reginfo/reginfo_sparx-5.ht= ml > > Out of curiosity, what tool was used to generate the register > information page? It looks really neat and well organized. Florian, It is an in-house tool. The input data is in a proprietary XML-like format. We're pleased that you like it, we do too. We are also pleased that being a Microchip entity, we can actually make this kind of information public. I'll pass your praise on. ---Lars -- Lars Povlsen, Microchip