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From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
To: Julien Grall <julien.grall@arm.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: Re: [Xen-devel] [PATCH 7/7] xen/arm: types: Specify the zero padding in the definition of PRIregister
Date: Fri, 26 Jul 2019 14:21:37 +0000	[thread overview]
Message-ID: <87d0hwj2q7.fsf@epam.com> (raw)
In-Reply-To: <b10a87d5-9fad-c051-774c-cd2d58fbc8dd@arm.com>


Julien Grall writes:

> Hi,
>
> On 26/07/2019 13:47, Volodymyr Babchuk wrote:
>>
>> Julien Grall writes:
>>
>>> The definition of PRIregister varies between Arm32 and Arm64 (32-bit vs
>>> 64-bit). However, some of the users uses the wrong padding.
>> type: "users use"
>>
>>> For more consistency, the padding is now moved into the PRIregister and
>>> varies depending on the architecture.
>> I'm not sure this is the right thing to do. There are lots of code
>> (especially in vgic) that does not use padding at all. Now it will print
>> padding, even if original author does not wanted to. And, honestly it is
>> hard to parse 15-16 zeroes in a row.
>
> Well, I am usually starting to read from the right to left. So, for
> me, 15-16 zeroes are easy to ignore ;).
And what if there only one bit set on position 31 or 35? :)
Personally, I'd like to see such number grouped like "FEDCBA98 76543210"
Anyways, this is matter of personal taste. I'm okay with padding.

>>
>> I am suggesting to add another macro like PRIregister_pad or something
>> like that.
>
> No, we should print register the same way everywhere. I am clearly against
> providing two different formats here for the same type. Otherwise this
> will lead to endless debate on which one you will chose in the code.
Okay then. But at least you should mention in the commit message, that
this change will affect other prints, not only the ones in the diff.

-- 
Volodymyr Babchuk at EPAM
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  reply	other threads:[~2019-07-26 14:21 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-23 21:35 [Xen-devel] [PATCH 0/7] xen/arm: Xen hardening for newer Armv8 Julien Grall
2019-07-23 21:35 ` [Xen-devel] [PATCH 1/7] xen/public: arch-arm: Restrict the visibility of struct vcpu_guest_core_regs Julien Grall
2019-07-26 12:14   ` Volodymyr Babchuk
2019-07-26 12:55     ` Julien Grall
2019-07-26 13:17       ` Volodymyr Babchuk
2019-07-29 21:14         ` Stefano Stabellini
2019-07-23 21:35 ` [Xen-devel] [PATCH 2/7] xen/arm: SCTLR_EL1 is a 64-bit register on Arm64 Julien Grall
2019-07-26 12:22   ` Volodymyr Babchuk
2019-07-29 21:33     ` Stefano Stabellini
2019-07-23 21:35 ` [Xen-devel] [PATCH 3/7] xen/arm: Rework psr_mode_is_32bit() Julien Grall
2019-07-26 12:31   ` Volodymyr Babchuk
2019-07-26 13:09     ` Julien Grall
2019-07-26 14:05       ` Volodymyr Babchuk
2019-07-29 21:52         ` Stefano Stabellini
2019-07-31 12:14           ` Julien Grall
2019-07-23 21:35 ` [Xen-devel] [PATCH 4/7] xen/arm: traps: Avoid using BUG_ON() in _show_registers() Julien Grall
2019-07-26 12:33   ` Volodymyr Babchuk
2019-07-29 21:55     ` Stefano Stabellini
2019-07-23 21:35 ` [Xen-devel] [PATCH 5/7] xen/arm: traps: Avoid BUG_ON() in do_trap_brk() Julien Grall
2019-07-26 12:38   ` Volodymyr Babchuk
2019-07-29 22:02   ` Stefano Stabellini
2019-07-30  8:59     ` Julien Grall
2019-07-30 17:00       ` Stefano Stabellini
2019-07-31 14:48         ` Andrew Cooper
2019-07-23 21:35 ` [Xen-devel] [PATCH 6/7] xen/arm: vsmc: The function identifier is always 32-bit Julien Grall
2019-07-26 12:39   ` Volodymyr Babchuk
2019-07-29 22:13     ` Stefano Stabellini
2019-07-23 21:35 ` [Xen-devel] [PATCH 7/7] xen/arm: types: Specify the zero padding in the definition of PRIregister Julien Grall
2019-07-26 12:47   ` Volodymyr Babchuk
2019-07-26 13:19     ` Julien Grall
2019-07-26 14:21       ` Volodymyr Babchuk [this message]
2019-07-26 14:35         ` Julien Grall
2019-07-26 14:42   ` Julien Grall
2019-07-26 17:05     ` Volodymyr Babchuk
2019-07-29 22:15       ` Stefano Stabellini

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