From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH 2/2] kvm/arm: consistently advance singlestep when emulating instructions Date: Fri, 09 Nov 2018 16:58:00 +0000 Message-ID: <87d0re5gtj.fsf@linaro.org> References: <20181109150711.45864-1-mark.rutland@arm.com> <20181109150711.45864-3-mark.rutland@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 7318D4A2C2 for ; Fri, 9 Nov 2018 11:58:07 -0500 (EST) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SpZJQIJVxIyr for ; Fri, 9 Nov 2018 11:58:04 -0500 (EST) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id BF8E84A2BE for ; Fri, 9 Nov 2018 11:58:03 -0500 (EST) Received: by mail-wr1-f68.google.com with SMTP id z16-v6so2633133wrv.2 for ; Fri, 09 Nov 2018 08:58:03 -0800 (PST) In-reply-to: <20181109150711.45864-3-mark.rutland@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Mark Rutland Cc: marc.zyngier@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu Ck1hcmsgUnV0bGFuZCA8bWFyay5ydXRsYW5kQGFybS5jb20+IHdyaXRlczoKCj4gV2hlbiB3ZSBl bXVsYXRlIGEgZ3Vlc3QgaW5zdHJ1Y3Rpb24sIHdlIGRvbid0IGFkdmFuY2UgdGhlIGhhcmR3YXJl Cj4gc2luZ2xlc3RlcCBzdGF0ZSBtYWNoaW5lLCBhbmQgdGh1cyB0aGUgZ3Vlc3Qgd2lsbCByZWNl aXZlIGEgc29mdHdhcmUKPiBzdGVwIGV4Y2VwdGlvbiBhZnRlciBhIG5leHQgaW5zdHJ1Y3Rpb24g d2hpY2ggaXMgbm90IGVtdWxhdGVkIGJ5IHRoZQo+IGhvc3QuCj4KPiBXZSBib2RnZSBhcm91bmQg dGhpcyBpbiBhbiBhZC1ob2MgZmFzaGlvbi4gU29tZXRpbWVzIHdlIGV4cGxpY2l0bHkgY2hlY2sK PiB3aGV0aGVyIHVzZXJzcGFjZSByZXF1ZXN0ZWQgYSBzaW5nbGUgc3RlcCwgYW5kIGZha2UgYSBk ZWJ1ZyBleGNlcHRpb24KPiBmcm9tIHdpdGhpbiB0aGUga2VybmVsLiBPdGhlciB0aW1lcywgd2Ug YWR2YW5jZSB0aGUgSFcgc2luZ2xlc3RlcCBzdGF0ZQo+IHJlbHkgb24gdGhlIEhXIHRvIGdlbmVy YXRlIHRoZSBleGNlcHRpb24gZm9yIHVzLiBUaHVzLCB0aGUgb2JzZXJ2ZWQgc3RlcAo+IGJlaGF2 aW91ciBkaWZmZXJzIGZvciBob3N0IGFuZCBndWVzdC4KPgo+IExldCdzIG1ha2UgdGhpcyBzaW1w bGVyIGFuZCBjb25zaXN0ZW50IGJ5IGFsd2F5cyBhZHZhbmNpbmcgdGhlIEhXCj4gc2luZ2xlc3Rl cCBzdGF0ZSBtYWNoaW5lIHdoZW4gd2Ugc2tpcCBhbiBpbnN0cnVjdGlvbi4gVGh1cyB3ZSBjYW4g cmVseQo+IG9uIHRoZSBoYXJkd2FyZSB0byBnZW5lcmF0ZSB0aGUgc2luZ2xlc3RlcCBleGNlcHRp b24gZm9yIHVzLCBhbmQgbmV2ZXIKPiBuZWVkIHRvIGV4cGxpY2l0bHkgY2hlY2sgZm9yIGFuIGFj dGl2ZS1wZW5kaW5nIHN0ZXAsIG5vciBkbyB3ZSBuZWVkIHRvCj4gZmFrZSBhIGRlYnVnIGV4Y2Vw dGlvbiBmcm9tIHRoZSBndWVzdC4KPgo+IFNpZ25lZC1vZmYtYnk6IE1hcmsgUnV0bGFuZCA8bWFy ay5ydXRsYW5kQGFybS5jb20+Cj4gQ2M6IEFsZXggQmVubsOpZSA8YWxleC5iZW5uZWVAbGluYXJv Lm9yZz4KPiBDYzogQ2hyaXN0b2ZmZXIgRGFsbCA8Y2hyaXN0b2ZmZXIuZGFsbEBhcm0uY29tPgo+ IENjOiBNYXJjIFp5bmdpZXIgPG1hcmMuenluZ2llckBhcm0uY29tPgo+IENjOiBQZXRlciBNYXlk ZWxsIDxwZXRlci5tYXlkZWxsQGxpbmFyby5vcmc+CgpSZXZpZXdlZC1ieTogQWxleCBCZW5uw6ll IDxhbGV4LmJlbm5lZUBsaW5hcm8ub3JnPgpUZXN0ZWQtYnk6IEFsZXggQmVubsOpZSA8YWxleC5i ZW5uZWVAbGluYXJvLm9yZz4KCkZvciByZWZlcmVuY2UgSSdtIGxlYXZpbmcgdGhpcyBrZXJuZWwg Ym9vdCBzb2FraW5nIG92ZXJuaWdodC4gSW4gdGhlb3J5CnRoZXJlIG1heSBiZSBhIGJyYW5jaCB0 byBzZWxmIGJ1dCB3ZSBzaGFsbCBzZWU6CgogIGh0dHBzOi8vZ2lzdC5naXRodWIuY29tL3N0c3F1 YWQvZGRmYjAwNzg3Y2IxMzNiNGI2NTg3NTZjYjZjNDdmNjMKCj4gLS0tCj4gIGFyY2gvYXJtL2lu Y2x1ZGUvYXNtL2t2bV9ob3N0LmggICAgICAgICAgfCAgNSAtLS0tCj4gIGFyY2gvYXJtNjQvaW5j bHVkZS9hc20va3ZtX2VtdWxhdGUuaCAgICAgfCAzNSArKysrKysrKysrKysrKysrKysrKy0tLS0t LQo+ICBhcmNoL2FybTY0L2luY2x1ZGUvYXNtL2t2bV9ob3N0LmggICAgICAgIHwgIDEgLQo+ICBh cmNoL2FybTY0L2t2bS9kZWJ1Zy5jICAgICAgICAgICAgICAgICAgIHwgMjEgLS0tLS0tLS0tLS0t LS0tLQo+ICBhcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhpdC5jICAgICAgICAgICAgIHwgMTQgKy0t LS0tLS0tLS0KPiAgYXJjaC9hcm02NC9rdm0vaHlwL3N3aXRjaC5jICAgICAgICAgICAgICB8IDQz ICsrKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tCj4gIGFyY2gvYXJtNjQva3ZtL2h5cC92 Z2ljLXYyLWNwdWlmLXByb3h5LmMgfCAxMiArKysrKystLS0KPiAgdmlydC9rdm0vYXJtL2FybS5j ICAgICAgICAgICAgICAgICAgICAgICB8ICAyIC0tCj4gIHZpcnQva3ZtL2FybS9oeXAvdmdpYy12 My1zci5jICAgICAgICAgICAgfCAgNiArKysrLQo+ICA5IGZpbGVzIGNoYW5nZWQsIDQ2IGluc2Vy dGlvbnMoKyksIDkzIGRlbGV0aW9ucygtKQo+Cj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtL2luY2x1 ZGUvYXNtL2t2bV9ob3N0LmggYi9hcmNoL2FybS9pbmNsdWRlL2FzbS9rdm1faG9zdC5oCj4gaW5k ZXggNWNhNWQ5YWYwYzI2Li5jNTYzNGM2ZmZjZWEgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9hcm0vaW5j bHVkZS9hc20va3ZtX2hvc3QuaAo+ICsrKyBiL2FyY2gvYXJtL2luY2x1ZGUvYXNtL2t2bV9ob3N0 LmgKPiBAQCAtMjk2LDExICsyOTYsNiBAQCBzdGF0aWMgaW5saW5lIHZvaWQga3ZtX2FybV9pbml0 X2RlYnVnKHZvaWQpIHt9Cj4gIHN0YXRpYyBpbmxpbmUgdm9pZCBrdm1fYXJtX3NldHVwX2RlYnVn KHN0cnVjdCBrdm1fdmNwdSAqdmNwdSkge30KPiAgc3RhdGljIGlubGluZSB2b2lkIGt2bV9hcm1f Y2xlYXJfZGVidWcoc3RydWN0IGt2bV92Y3B1ICp2Y3B1KSB7fQo+ICBzdGF0aWMgaW5saW5lIHZv aWQga3ZtX2FybV9yZXNldF9kZWJ1Z19wdHIoc3RydWN0IGt2bV92Y3B1ICp2Y3B1KSB7fQo+IC1z dGF0aWMgaW5saW5lIGJvb2wga3ZtX2FybV9oYW5kbGVfc3RlcF9kZWJ1ZyhzdHJ1Y3Qga3ZtX3Zj cHUgKnZjcHUsCj4gLQkJCQkJICAgICBzdHJ1Y3Qga3ZtX3J1biAqcnVuKQo+IC17Cj4gLQlyZXR1 cm4gZmFsc2U7Cj4gLX0KPgo+ICBpbnQga3ZtX2FybV92Y3B1X2FyY2hfc2V0X2F0dHIoc3RydWN0 IGt2bV92Y3B1ICp2Y3B1LAo+ICAJCQkgICAgICAgc3RydWN0IGt2bV9kZXZpY2VfYXR0ciAqYXR0 cik7Cj4gZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQvaW5jbHVkZS9hc20va3ZtX2VtdWxhdGUuaCBi L2FyY2gvYXJtNjQvaW5jbHVkZS9hc20va3ZtX2VtdWxhdGUuaAo+IGluZGV4IDIxMjQ3ODcwZGVm Ny4uNTA2Mzg2YTNlZGRlIDEwMDY0NAo+IC0tLSBhL2FyY2gvYXJtNjQvaW5jbHVkZS9hc20va3Zt X2VtdWxhdGUuaAo+ICsrKyBiL2FyY2gvYXJtNjQvaW5jbHVkZS9hc20va3ZtX2VtdWxhdGUuaAo+ IEBAIC0yNCw2ICsyNCw3IEBACj4KPiAgI2luY2x1ZGUgPGxpbnV4L2t2bV9ob3N0Lmg+Cj4KPiAr I2luY2x1ZGUgPGFzbS9kZWJ1Zy1tb25pdG9ycy5oPgo+ICAjaW5jbHVkZSA8YXNtL2Vzci5oPgo+ ICAjaW5jbHVkZSA8YXNtL2t2bV9hcm0uaD4KPiAgI2luY2x1ZGUgPGFzbS9rdm1faHlwLmg+Cj4g QEAgLTE0NywxNCArMTQ4LDYgQEAgc3RhdGljIGlubGluZSBib29sIGt2bV9jb25kaXRpb25fdmFs aWQoY29uc3Qgc3RydWN0IGt2bV92Y3B1ICp2Y3B1KQo+ICAJcmV0dXJuIHRydWU7Cj4gIH0KPgo+ IC1zdGF0aWMgaW5saW5lIHZvaWQga3ZtX3NraXBfaW5zdHIoc3RydWN0IGt2bV92Y3B1ICp2Y3B1 LCBib29sIGlzX3dpZGVfaW5zdHIpCj4gLXsKPiAtCWlmICh2Y3B1X21vZGVfaXNfMzJiaXQodmNw dSkpCj4gLQkJa3ZtX3NraXBfaW5zdHIzMih2Y3B1LCBpc193aWRlX2luc3RyKTsKPiAtCWVsc2UK PiAtCQkqdmNwdV9wYyh2Y3B1KSArPSA0Owo+IC19Cj4gLQo+ICBzdGF0aWMgaW5saW5lIHZvaWQg dmNwdV9zZXRfdGh1bWIoc3RydWN0IGt2bV92Y3B1ICp2Y3B1KQo+ICB7Cj4gIAkqdmNwdV9jcHNy KHZjcHUpIHw9IFBTUl9BQTMyX1RfQklUOwo+IEBAIC00MjQsNCArNDE3LDMwIEBAIHN0YXRpYyBp bmxpbmUgdW5zaWduZWQgbG9uZyB2Y3B1X2RhdGFfaG9zdF90b19ndWVzdChzdHJ1Y3Qga3ZtX3Zj cHUgKnZjcHUsCj4gIAlyZXR1cm4gZGF0YTsJCS8qIExlYXZlIExFIHVudG91Y2hlZCAqLwo+ICB9 Cj4KPiArc3RhdGljIGlubGluZSB2b2lkIGt2bV9za2lwX2luc3RyKHN0cnVjdCBrdm1fdmNwdSAq dmNwdSwgYm9vbCBpc193aWRlX2luc3RyKQo+ICt7Cj4gKwlpZiAodmNwdV9tb2RlX2lzXzMyYml0 KHZjcHUpKQo+ICsJCWt2bV9za2lwX2luc3RyMzIodmNwdSwgaXNfd2lkZV9pbnN0cik7Cj4gKwll bHNlCj4gKwkJKnZjcHVfcGModmNwdSkgKz0gNDsKPiArCj4gKwkvKiBhZHZhbmNlIHRoZSBzaW5n bGVzdGVwIHN0YXRlIG1hY2hpbmUgKi8KPiArCSp2Y3B1X2Nwc3IodmNwdSkgJj0gfkRCR19TUFNS X1NTOwo+ICt9Cj4gKwo+ICsvKgo+ICsgKiBTa2lwIGFuIGluc3RydWN0aW9uIHdoaWNoIGhhcyBi ZWVuIGVtdWxhdGVkIGF0IGh5cCB3aGlsZSBtb3N0IGd1ZXN0IHN5c3JlZ3MKPiArICogYXJlIGxp dmUuCj4gKyAqLwo+ICtzdGF0aWMgaW5saW5lIHZvaWQgX19oeXBfdGV4dCBfX2t2bV9za2lwX2lu c3RyKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSkKPiArewo+ICsJKnZjcHVfcGModmNwdSkgPSByZWFk X3N5c3JlZ19lbDIoZWxyKTsKPiArCXZjcHUtPmFyY2guY3R4dC5ncF9yZWdzLnJlZ3MucHN0YXRl ID0gcmVhZF9zeXNyZWdfZWwyKHNwc3IpOwo+ICsKPiArCWt2bV9za2lwX2luc3RyKHZjcHUsIGt2 bV92Y3B1X3RyYXBfaWxfaXMzMmJpdCh2Y3B1KSk7Cj4gKwo+ICsJd3JpdGVfc3lzcmVnX2VsMih2 Y3B1LT5hcmNoLmN0eHQuZ3BfcmVncy5yZWdzLnBzdGF0ZSwgc3Bzcik7Cj4gKwl3cml0ZV9zeXNy ZWdfZWwyKCp2Y3B1X3BjKHZjcHUpLCBlbHIpOwo+ICt9Cj4gKwo+ICAjZW5kaWYgLyogX19BUk02 NF9LVk1fRU1VTEFURV9IX18gKi8KPiBkaWZmIC0tZ2l0IGEvYXJjaC9hcm02NC9pbmNsdWRlL2Fz bS9rdm1faG9zdC5oIGIvYXJjaC9hcm02NC9pbmNsdWRlL2FzbS9rdm1faG9zdC5oCj4gaW5kZXgg NTJmYmM4MjNmZjhjLi43YTUwMzVmOWM1YzMgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9hcm02NC9pbmNs dWRlL2FzbS9rdm1faG9zdC5oCj4gKysrIGIvYXJjaC9hcm02NC9pbmNsdWRlL2FzbS9rdm1faG9z dC5oCj4gQEAgLTQ0NSw3ICs0NDUsNiBAQCB2b2lkIGt2bV9hcm1faW5pdF9kZWJ1Zyh2b2lkKTsK PiAgdm9pZCBrdm1fYXJtX3NldHVwX2RlYnVnKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSk7Cj4gIHZv aWQga3ZtX2FybV9jbGVhcl9kZWJ1ZyhzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUpOwo+ICB2b2lkIGt2 bV9hcm1fcmVzZXRfZGVidWdfcHRyKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSk7Cj4gLWJvb2wga3Zt X2FybV9oYW5kbGVfc3RlcF9kZWJ1ZyhzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIHN0cnVjdCBrdm1f cnVuICpydW4pOwo+ICBpbnQga3ZtX2FybV92Y3B1X2FyY2hfc2V0X2F0dHIoc3RydWN0IGt2bV92 Y3B1ICp2Y3B1LAo+ICAJCQkgICAgICAgc3RydWN0IGt2bV9kZXZpY2VfYXR0ciAqYXR0cik7Cj4g IGludCBrdm1fYXJtX3ZjcHVfYXJjaF9nZXRfYXR0cihzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsCj4g ZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQva3ZtL2RlYnVnLmMgYi9hcmNoL2FybTY0L2t2bS9kZWJ1 Zy5jCj4gaW5kZXggMDBkNDIyMzM2YTQ1Li5mMzk4MDFlNDEzNmMgMTAwNjQ0Cj4gLS0tIGEvYXJj aC9hcm02NC9rdm0vZGVidWcuYwo+ICsrKyBiL2FyY2gvYXJtNjQva3ZtL2RlYnVnLmMKPiBAQCAt MjM2LDI0ICsyMzYsMyBAQCB2b2lkIGt2bV9hcm1fY2xlYXJfZGVidWcoc3RydWN0IGt2bV92Y3B1 ICp2Y3B1KQo+ICAJCX0KPiAgCX0KPiAgfQo+IC0KPiAtCj4gLS8qCj4gLSAqIEFmdGVyIHN1Y2Nl c3NmdWxseSBlbXVsYXRpbmcgYW4gaW5zdHJ1Y3Rpb24sIHdlIG1pZ2h0IHdhbnQgdG8KPiAtICog cmV0dXJuIHRvIHVzZXIgc3BhY2Ugd2l0aCBhIEtWTV9FWElUX0RFQlVHLiBXZSBjYW4gb25seSBk byB0aGlzCj4gLSAqIG9uY2UgdGhlIGVtdWxhdGlvbiBpcyBjb21wbGV0ZSwgdGhvdWdoLCBzbyBm b3IgdXNlcnNwYWNlIGVtdWxhdGlvbnMKPiAtICogd2UgaGF2ZSB0byB3YWl0IHVudGlsIHdlIGhh dmUgcmUtZW50ZXJlZCBLVk0gYmVmb3JlIGNhbGxpbmcgdGhpcwo+IC0gKiBoZWxwZXIuCj4gLSAq Cj4gLSAqIFJldHVybiB0cnVlIChhbmQgc2V0IGV4aXRfcmVhc29uKSB0byByZXR1cm4gdG8gdXNl cnNwYWNlIG9yIGZhbHNlCj4gLSAqIGlmIG5vIGZ1cnRoZXIgYWN0aW9uIGlzIHJlcXVpcmVkLgo+ IC0gKi8KPiAtYm9vbCBrdm1fYXJtX2hhbmRsZV9zdGVwX2RlYnVnKHN0cnVjdCBrdm1fdmNwdSAq dmNwdSwgc3RydWN0IGt2bV9ydW4gKnJ1bikKPiAtewo+IC0JaWYgKHZjcHUtPmd1ZXN0X2RlYnVn ICYgS1ZNX0dVRVNUREJHX1NJTkdMRVNURVApIHsKPiAtCQlydW4tPmV4aXRfcmVhc29uID0gS1ZN X0VYSVRfREVCVUc7Cj4gLQkJcnVuLT5kZWJ1Zy5hcmNoLmhzciA9IEVTUl9FTHhfRUNfU09GVFNU UF9MT1cgPDwgRVNSX0VMeF9FQ19TSElGVDsKPiAtCQlyZXR1cm4gdHJ1ZTsKPiAtCX0KPiAtCXJl dHVybiBmYWxzZTsKPiAtfQo+IGRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhp dC5jIGIvYXJjaC9hcm02NC9rdm0vaGFuZGxlX2V4aXQuYwo+IGluZGV4IDM1YTgxYmViZDAyYi4u YjA2NDNmOWM0ODczIDEwMDY0NAo+IC0tLSBhL2FyY2gvYXJtNjQva3ZtL2hhbmRsZV9leGl0LmMK PiArKysgYi9hcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhpdC5jCj4gQEAgLTIyOSwxMyArMjI5LDYg QEAgc3RhdGljIGludCBoYW5kbGVfdHJhcF9leGNlcHRpb25zKHN0cnVjdCBrdm1fdmNwdSAqdmNw dSwgc3RydWN0IGt2bV9ydW4gKnJ1bikKPiAgCQloYW5kbGVkID0gZXhpdF9oYW5kbGVyKHZjcHUs IHJ1bik7Cj4gIAl9Cj4KPiAtCS8qCj4gLQkgKiBrdm1fYXJtX2hhbmRsZV9zdGVwX2RlYnVnKCkg c2V0cyB0aGUgZXhpdF9yZWFzb24gb24gdGhlIGt2bV9ydW4KPiAtCSAqIHN0cnVjdHVyZSBpZiB3 ZSBuZWVkIHRvIHJldHVybiB0byB1c2Vyc3BhY2UuCj4gLQkgKi8KPiAtCWlmIChoYW5kbGVkID4g MCAmJiBrdm1fYXJtX2hhbmRsZV9zdGVwX2RlYnVnKHZjcHUsIHJ1bikpCj4gLQkJaGFuZGxlZCA9 IDA7Cj4gLQo+ICAJcmV0dXJuIGhhbmRsZWQ7Cj4gIH0KPgo+IEBAIC0yNjksMTIgKzI2Miw3IEBA IGludCBoYW5kbGVfZXhpdChzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIHN0cnVjdCBrdm1fcnVuICpy dW4sCj4gIAljYXNlIEFSTV9FWENFUFRJT05fSVJROgo+ICAJCXJldHVybiAxOwo+ICAJY2FzZSBB Uk1fRVhDRVBUSU9OX0VMMV9TRVJST1I6Cj4gLQkJLyogV2UgbWF5IHN0aWxsIG5lZWQgdG8gcmV0 dXJuIGZvciBzaW5nbGUtc3RlcCAqLwo+IC0JCWlmICghKCp2Y3B1X2Nwc3IodmNwdSkgJiBEQkdf U1BTUl9TUykKPiAtCQkJJiYga3ZtX2FybV9oYW5kbGVfc3RlcF9kZWJ1Zyh2Y3B1LCBydW4pKQo+ IC0JCQlyZXR1cm4gMDsKPiAtCQllbHNlCj4gLQkJCXJldHVybiAxOwo+ICsJCXJldHVybiAxOwo+ ICAJY2FzZSBBUk1fRVhDRVBUSU9OX1RSQVA6Cj4gIAkJcmV0dXJuIGhhbmRsZV90cmFwX2V4Y2Vw dGlvbnModmNwdSwgcnVuKTsKPiAgCWNhc2UgQVJNX0VYQ0VQVElPTl9IWVBfR09ORToKPiBkaWZm IC0tZ2l0IGEvYXJjaC9hcm02NC9rdm0vaHlwL3N3aXRjaC5jIGIvYXJjaC9hcm02NC9rdm0vaHlw L3N3aXRjaC5jCj4gaW5kZXggN2NjMTc1Yzg4YTM3Li40MjgyZjA1NzcxYzEgMTAwNjQ0Cj4gLS0t IGEvYXJjaC9hcm02NC9rdm0vaHlwL3N3aXRjaC5jCj4gKysrIGIvYXJjaC9hcm02NC9rdm0vaHlw L3N3aXRjaC5jCj4gQEAgLTMwNSwzMyArMzA1LDYgQEAgc3RhdGljIGJvb2wgX19oeXBfdGV4dCBf X3BvcHVsYXRlX2ZhdWx0X2luZm8oc3RydWN0IGt2bV92Y3B1ICp2Y3B1KQo+ICAJcmV0dXJuIHRy dWU7Cj4gIH0KPgo+IC0vKiBTa2lwIGFuIGluc3RydWN0aW9uIHdoaWNoIGhhcyBiZWVuIGVtdWxh dGVkLiBSZXR1cm5zIHRydWUgaWYKPiAtICogZXhlY3V0aW9uIGNhbiBjb250aW51ZSBvciBmYWxz ZSBpZiB3ZSBuZWVkIHRvIGV4aXQgaHlwIG1vZGUgYmVjYXVzZQo+IC0gKiBzaW5nbGUtc3RlcCB3 YXMgaW4gZWZmZWN0Lgo+IC0gKi8KPiAtc3RhdGljIGJvb2wgX19oeXBfdGV4dCBfX3NraXBfaW5z dHIoc3RydWN0IGt2bV92Y3B1ICp2Y3B1KQo+IC17Cj4gLQkqdmNwdV9wYyh2Y3B1KSA9IHJlYWRf c3lzcmVnX2VsMihlbHIpOwo+IC0KPiAtCWlmICh2Y3B1X21vZGVfaXNfMzJiaXQodmNwdSkpIHsK PiAtCQl2Y3B1LT5hcmNoLmN0eHQuZ3BfcmVncy5yZWdzLnBzdGF0ZSA9IHJlYWRfc3lzcmVnX2Vs MihzcHNyKTsKPiAtCQlrdm1fc2tpcF9pbnN0cjMyKHZjcHUsIGt2bV92Y3B1X3RyYXBfaWxfaXMz MmJpdCh2Y3B1KSk7Cj4gLQkJd3JpdGVfc3lzcmVnX2VsMih2Y3B1LT5hcmNoLmN0eHQuZ3BfcmVn cy5yZWdzLnBzdGF0ZSwgc3Bzcik7Cj4gLQl9IGVsc2Ugewo+IC0JCSp2Y3B1X3BjKHZjcHUpICs9 IDQ7Cj4gLQl9Cj4gLQo+IC0Jd3JpdGVfc3lzcmVnX2VsMigqdmNwdV9wYyh2Y3B1KSwgZWxyKTsK PiAtCj4gLQlpZiAodmNwdS0+Z3Vlc3RfZGVidWcgJiBLVk1fR1VFU1REQkdfU0lOR0xFU1RFUCkg ewo+IC0JCXZjcHUtPmFyY2guZmF1bHQuZXNyX2VsMiA9Cj4gLQkJCShFU1JfRUx4X0VDX1NPRlRT VFBfTE9XIDw8IEVTUl9FTHhfRUNfU0hJRlQpIHwgMHgyMjsKPiAtCQlyZXR1cm4gZmFsc2U7Cj4g LQl9IGVsc2Ugewo+IC0JCXJldHVybiB0cnVlOwo+IC0JfQo+IC19Cj4gLQo+ICBzdGF0aWMgYm9v bCBfX2h5cF90ZXh0IF9faHlwX3N3aXRjaF9mcHNpbWQoc3RydWN0IGt2bV92Y3B1ICp2Y3B1KQo+ ICB7Cj4gIAlzdHJ1Y3QgdXNlcl9mcHNpbWRfc3RhdGUgKmhvc3RfZnBzaW1kID0gdmNwdS0+YXJj aC5ob3N0X2Zwc2ltZF9zdGF0ZTsKPiBAQCAtNDIwLDIwICszOTMsMTIgQEAgc3RhdGljIGJvb2wg X19oeXBfdGV4dCBmaXh1cF9ndWVzdF9leGl0KHN0cnVjdCBrdm1fdmNwdSAqdmNwdSwgdTY0ICpl eGl0X2NvZGUpCj4gIAkJaWYgKHZhbGlkKSB7Cj4gIAkJCWludCByZXQgPSBfX3ZnaWNfdjJfcGVy Zm9ybV9jcHVpZl9hY2Nlc3ModmNwdSk7Cj4KPiAtCQkJaWYgKHJldCA9PSAgMSAmJiBfX3NraXBf aW5zdHIodmNwdSkpCj4gKwkJCWlmIChyZXQgPT0gMSkKPiAgCQkJCXJldHVybiB0cnVlOwo+Cj4g LQkJCWlmIChyZXQgPT0gLTEpIHsKPiAtCQkJCS8qIFByb21vdGUgYW4gaWxsZWdhbCBhY2Nlc3Mg dG8gYW4KPiAtCQkJCSAqIFNFcnJvci4gSWYgd2Ugd291bGQgYmUgcmV0dXJuaW5nCj4gLQkJCQkg KiBkdWUgdG8gc2luZ2xlLXN0ZXAgY2xlYXIgdGhlIFNTCj4gLQkJCQkgKiBiaXQgc28gaGFuZGxl X2V4aXQga25vd3Mgd2hhdCB0bwo+IC0JCQkJICogZG8gYWZ0ZXIgZGVhbGluZyB3aXRoIHRoZSBl cnJvci4KPiAtCQkJCSAqLwo+IC0JCQkJaWYgKCFfX3NraXBfaW5zdHIodmNwdSkpCj4gLQkJCQkJ KnZjcHVfY3Bzcih2Y3B1KSAmPSB+REJHX1NQU1JfU1M7Cj4gKwkJCS8qIFByb21vdGUgYW4gaWxs ZWdhbCBhY2Nlc3MgdG8gYW4gU0Vycm9yLiovCj4gKwkJCWlmIChyZXQgPT0gLTEpCj4gIAkJCQkq ZXhpdF9jb2RlID0gQVJNX0VYQ0VQVElPTl9FTDFfU0VSUk9SOwo+IC0JCQl9Cj4KPiAgCQkJZ290 byBleGl0Owo+ICAJCX0KPiBAQCAtNDQ0LDcgKzQwOSw3IEBAIHN0YXRpYyBib29sIF9faHlwX3Rl eHQgZml4dXBfZ3Vlc3RfZXhpdChzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIHU2NCAqZXhpdF9jb2Rl KQo+ICAJICAgICBrdm1fdmNwdV90cmFwX2dldF9jbGFzcyh2Y3B1KSA9PSBFU1JfRUx4X0VDX0NQ MTVfMzIpKSB7Cj4gIAkJaW50IHJldCA9IF9fdmdpY192M19wZXJmb3JtX2NwdWlmX2FjY2Vzcyh2 Y3B1KTsKPgo+IC0JCWlmIChyZXQgPT0gMSAmJiBfX3NraXBfaW5zdHIodmNwdSkpCj4gKwkJaWYg KHJldCA9PSAxKQo+ICAJCQlyZXR1cm4gdHJ1ZTsKPiAgCX0KPgo+IGRpZmYgLS1naXQgYS9hcmNo L2FybTY0L2t2bS9oeXAvdmdpYy12Mi1jcHVpZi1wcm94eS5jIGIvYXJjaC9hcm02NC9rdm0vaHlw L3ZnaWMtdjItY3B1aWYtcHJveHkuYwo+IGluZGV4IDIxNWM3YzBlYjNiMC4uOWNiZGQwMzRhNTYz IDEwMDY0NAo+IC0tLSBhL2FyY2gvYXJtNjQva3ZtL2h5cC92Z2ljLXYyLWNwdWlmLXByb3h5LmMK PiArKysgYi9hcmNoL2FybTY0L2t2bS9oeXAvdmdpYy12Mi1jcHVpZi1wcm94eS5jCj4gQEAgLTQx LDcgKzQxLDcgQEAgc3RhdGljIGJvb2wgX19oeXBfdGV4dCBfX2lzX2JlKHN0cnVjdCBrdm1fdmNw dSAqdmNwdSkKPiAgICogUmV0dXJuczoKPiAgICogIDE6IEdJQ1YgYWNjZXNzIHN1Y2Nlc3NmdWxs eSBwZXJmb3JtZWQKPiAgICogIDA6IE5vdCBhIEdJQ1YgYWNjZXNzCj4gLSAqIC0xOiBJbGxlZ2Fs IEdJQ1YgYWNjZXNzCj4gKyAqIC0xOiBJbGxlZ2FsIEdJQ1YgYWNjZXNzIHN1Y2Nlc3NmdWxseSBw ZXJmb3JtZWQKPiAgICovCj4gIGludCBfX2h5cF90ZXh0IF9fdmdpY192Ml9wZXJmb3JtX2NwdWlm X2FjY2VzcyhzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUpCj4gIHsKPiBAQCAtNjEsMTIgKzYxLDE2IEBA IGludCBfX2h5cF90ZXh0IF9fdmdpY192Ml9wZXJmb3JtX2NwdWlmX2FjY2VzcyhzdHJ1Y3Qga3Zt X3ZjcHUgKnZjcHUpCj4gIAkJcmV0dXJuIDA7Cj4KPiAgCS8qIFJlamVjdCBhbnl0aGluZyBidXQg YSAzMmJpdCBhY2Nlc3MgKi8KPiAtCWlmIChrdm1fdmNwdV9kYWJ0X2dldF9hcyh2Y3B1KSAhPSBz aXplb2YodTMyKSkKPiArCWlmIChrdm1fdmNwdV9kYWJ0X2dldF9hcyh2Y3B1KSAhPSBzaXplb2Yo dTMyKSkgewo+ICsJCV9fa3ZtX3NraXBfaW5zdHIodmNwdSk7Cj4gIAkJcmV0dXJuIC0xOwo+ICsJ fQo+Cj4gIAkvKiBOb3QgYWxpZ25lZD8gRG9uJ3QgYm90aGVyICovCj4gLQlpZiAoZmF1bHRfaXBh ICYgMykKPiArCWlmIChmYXVsdF9pcGEgJiAzKSB7Cj4gKwkJX19rdm1fc2tpcF9pbnN0cih2Y3B1 KTsKPiAgCQlyZXR1cm4gLTE7Cj4gKwl9Cj4KPiAgCXJkID0ga3ZtX3ZjcHVfZGFidF9nZXRfcmQo dmNwdSk7Cj4gIAlhZGRyICA9IGh5cF9zeW1ib2xfYWRkcihrdm1fdmdpY19nbG9iYWxfc3RhdGUp LT52Y3B1X2h5cF92YTsKPiBAQCAtODgsNSArOTIsNyBAQCBpbnQgX19oeXBfdGV4dCBfX3ZnaWNf djJfcGVyZm9ybV9jcHVpZl9hY2Nlc3Moc3RydWN0IGt2bV92Y3B1ICp2Y3B1KQo+ICAJCXZjcHVf c2V0X3JlZyh2Y3B1LCByZCwgZGF0YSk7Cj4gIAl9Cj4KPiArCV9fa3ZtX3NraXBfaW5zdHIodmNw dSk7Cj4gKwo+ICAJcmV0dXJuIDE7Cj4gIH0KPiBkaWZmIC0tZ2l0IGEvdmlydC9rdm0vYXJtL2Fy bS5jIGIvdmlydC9rdm0vYXJtL2FybS5jCj4gaW5kZXggMjM3NzQ5NzBjOWRmLi40YWRjZWU1ZmMx MjYgMTAwNjQ0Cj4gLS0tIGEvdmlydC9rdm0vYXJtL2FybS5jCj4gKysrIGIvdmlydC9rdm0vYXJt L2FybS5jCj4gQEAgLTY3NCw4ICs2NzQsNiBAQCBpbnQga3ZtX2FyY2hfdmNwdV9pb2N0bF9ydW4o c3RydWN0IGt2bV92Y3B1ICp2Y3B1LCBzdHJ1Y3Qga3ZtX3J1biAqcnVuKQo+ICAJCXJldCA9IGt2 bV9oYW5kbGVfbW1pb19yZXR1cm4odmNwdSwgdmNwdS0+cnVuKTsKPiAgCQlpZiAocmV0KQo+ICAJ CQlyZXR1cm4gcmV0Owo+IC0JCWlmIChrdm1fYXJtX2hhbmRsZV9zdGVwX2RlYnVnKHZjcHUsIHZj cHUtPnJ1bikpCj4gLQkJCXJldHVybiAwOwo+ICAJfQo+Cj4gIAlpZiAocnVuLT5pbW1lZGlhdGVf ZXhpdCkKPiBkaWZmIC0tZ2l0IGEvdmlydC9rdm0vYXJtL2h5cC92Z2ljLXYzLXNyLmMgYi92aXJ0 L2t2bS9hcm0vaHlwL3ZnaWMtdjMtc3IuYwo+IGluZGV4IDYxNmU1YTQzM2FiMC4uOTY1MmM0NTM0 ODBmIDEwMDY0NAo+IC0tLSBhL3ZpcnQva3ZtL2FybS9oeXAvdmdpYy12My1zci5jCj4gKysrIGIv dmlydC9rdm0vYXJtL2h5cC92Z2ljLXYzLXNyLmMKPiBAQCAtMTAxMiw4ICsxMDEyLDEwIEBAIGlu dCBfX2h5cF90ZXh0IF9fdmdpY192M19wZXJmb3JtX2NwdWlmX2FjY2VzcyhzdHJ1Y3Qga3ZtX3Zj cHUgKnZjcHUpCj4KPiAgCWVzciA9IGt2bV92Y3B1X2dldF9oc3IodmNwdSk7Cj4gIAlpZiAodmNw dV9tb2RlX2lzXzMyYml0KHZjcHUpKSB7Cj4gLQkJaWYgKCFrdm1fY29uZGl0aW9uX3ZhbGlkKHZj cHUpKQo+ICsJCWlmICgha3ZtX2NvbmRpdGlvbl92YWxpZCh2Y3B1KSkgewo+ICsJCQlfX2t2bV9z a2lwX2luc3RyKHZjcHUpOwo+ICAJCQlyZXR1cm4gMTsKPiArCQl9Cj4KPiAgCQlzeXNyZWcgPSBl c3JfY3AxNV90b19zeXNyZWcoZXNyKTsKPiAgCX0gZWxzZSB7Cj4gQEAgLTExMjMsNiArMTEyNSw4 IEBAIGludCBfX2h5cF90ZXh0IF9fdmdpY192M19wZXJmb3JtX2NwdWlmX2FjY2VzcyhzdHJ1Y3Qg a3ZtX3ZjcHUgKnZjcHUpCj4gIAlydCA9IGt2bV92Y3B1X3N5c19nZXRfcnQodmNwdSk7Cj4gIAlm bih2Y3B1LCB2bWNyLCBydCk7Cj4KPiArCV9fa3ZtX3NraXBfaW5zdHIodmNwdSk7Cj4gKwo+ICAJ cmV0dXJuIDE7Cj4gIH0KCgotLQpBbGV4IEJlbm7DqWUKX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX18Ka3ZtYXJtIG1haWxpbmcgbGlzdAprdm1hcm1AbGlzdHMu Y3MuY29sdW1iaWEuZWR1Cmh0dHBzOi8vbGlzdHMuY3MuY29sdW1iaWEuZWR1L21haWxtYW4vbGlz dGluZm8va3ZtYXJtCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (Alex =?utf-8?Q?Benn=C3=A9e?=) Date: Fri, 09 Nov 2018 16:58:00 +0000 Subject: [PATCH 2/2] kvm/arm: consistently advance singlestep when emulating instructions In-Reply-To: <20181109150711.45864-3-mark.rutland@arm.com> References: <20181109150711.45864-1-mark.rutland@arm.com> <20181109150711.45864-3-mark.rutland@arm.com> Message-ID: <87d0re5gtj.fsf@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Mark Rutland writes: > When we emulate a guest instruction, we don't advance the hardware > singlestep state machine, and thus the guest will receive a software > step exception after a next instruction which is not emulated by the > host. > > We bodge around this in an ad-hoc fashion. Sometimes we explicitly check > whether userspace requested a single step, and fake a debug exception > from within the kernel. Other times, we advance the HW singlestep state > rely on the HW to generate the exception for us. Thus, the observed step > behaviour differs for host and guest. > > Let's make this simpler and consistent by always advancing the HW > singlestep state machine when we skip an instruction. Thus we can rely > on the hardware to generate the singlestep exception for us, and never > need to explicitly check for an active-pending step, nor do we need to > fake a debug exception from the guest. > > Signed-off-by: Mark Rutland > Cc: Alex Benn?e > Cc: Christoffer Dall > Cc: Marc Zyngier > Cc: Peter Maydell Reviewed-by: Alex Benn?e Tested-by: Alex Benn?e For reference I'm leaving this kernel boot soaking overnight. In theory there may be a branch to self but we shall see: https://gist.github.com/stsquad/ddfb00787cb133b4b658756cb6c47f63 > --- > arch/arm/include/asm/kvm_host.h | 5 ---- > arch/arm64/include/asm/kvm_emulate.h | 35 ++++++++++++++++++++------ > arch/arm64/include/asm/kvm_host.h | 1 - > arch/arm64/kvm/debug.c | 21 ---------------- > arch/arm64/kvm/handle_exit.c | 14 +---------- > arch/arm64/kvm/hyp/switch.c | 43 +++----------------------------- > arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c | 12 ++++++--- > virt/kvm/arm/arm.c | 2 -- > virt/kvm/arm/hyp/vgic-v3-sr.c | 6 ++++- > 9 files changed, 46 insertions(+), 93 deletions(-) > > diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h > index 5ca5d9af0c26..c5634c6ffcea 100644 > --- a/arch/arm/include/asm/kvm_host.h > +++ b/arch/arm/include/asm/kvm_host.h > @@ -296,11 +296,6 @@ static inline void kvm_arm_init_debug(void) {} > static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {} > static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {} > static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {} > -static inline bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu, > - struct kvm_run *run) > -{ > - return false; > -} > > int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, > struct kvm_device_attr *attr); > diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h > index 21247870def7..506386a3edde 100644 > --- a/arch/arm64/include/asm/kvm_emulate.h > +++ b/arch/arm64/include/asm/kvm_emulate.h > @@ -24,6 +24,7 @@ > > #include > > +#include > #include > #include > #include > @@ -147,14 +148,6 @@ static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu) > return true; > } > > -static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr) > -{ > - if (vcpu_mode_is_32bit(vcpu)) > - kvm_skip_instr32(vcpu, is_wide_instr); > - else > - *vcpu_pc(vcpu) += 4; > -} > - > static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu) > { > *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT; > @@ -424,4 +417,30 @@ static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu, > return data; /* Leave LE untouched */ > } > > +static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr) > +{ > + if (vcpu_mode_is_32bit(vcpu)) > + kvm_skip_instr32(vcpu, is_wide_instr); > + else > + *vcpu_pc(vcpu) += 4; > + > + /* advance the singlestep state machine */ > + *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; > +} > + > +/* > + * Skip an instruction which has been emulated at hyp while most guest sysregs > + * are live. > + */ > +static inline void __hyp_text __kvm_skip_instr(struct kvm_vcpu *vcpu) > +{ > + *vcpu_pc(vcpu) = read_sysreg_el2(elr); > + vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(spsr); > + > + kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); > + > + write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, spsr); > + write_sysreg_el2(*vcpu_pc(vcpu), elr); > +} > + > #endif /* __ARM64_KVM_EMULATE_H__ */ > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 52fbc823ff8c..7a5035f9c5c3 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -445,7 +445,6 @@ void kvm_arm_init_debug(void); > void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); > void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); > void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); > -bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu, struct kvm_run *run); > int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, > struct kvm_device_attr *attr); > int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, > diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c > index 00d422336a45..f39801e4136c 100644 > --- a/arch/arm64/kvm/debug.c > +++ b/arch/arm64/kvm/debug.c > @@ -236,24 +236,3 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) > } > } > } > - > - > -/* > - * After successfully emulating an instruction, we might want to > - * return to user space with a KVM_EXIT_DEBUG. We can only do this > - * once the emulation is complete, though, so for userspace emulations > - * we have to wait until we have re-entered KVM before calling this > - * helper. > - * > - * Return true (and set exit_reason) to return to userspace or false > - * if no further action is required. > - */ > -bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) > -{ > - if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { > - run->exit_reason = KVM_EXIT_DEBUG; > - run->debug.arch.hsr = ESR_ELx_EC_SOFTSTP_LOW << ESR_ELx_EC_SHIFT; > - return true; > - } > - return false; > -} > diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c > index 35a81bebd02b..b0643f9c4873 100644 > --- a/arch/arm64/kvm/handle_exit.c > +++ b/arch/arm64/kvm/handle_exit.c > @@ -229,13 +229,6 @@ static int handle_trap_exceptions(struct kvm_vcpu *vcpu, struct kvm_run *run) > handled = exit_handler(vcpu, run); > } > > - /* > - * kvm_arm_handle_step_debug() sets the exit_reason on the kvm_run > - * structure if we need to return to userspace. > - */ > - if (handled > 0 && kvm_arm_handle_step_debug(vcpu, run)) > - handled = 0; > - > return handled; > } > > @@ -269,12 +262,7 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, > case ARM_EXCEPTION_IRQ: > return 1; > case ARM_EXCEPTION_EL1_SERROR: > - /* We may still need to return for single-step */ > - if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS) > - && kvm_arm_handle_step_debug(vcpu, run)) > - return 0; > - else > - return 1; > + return 1; > case ARM_EXCEPTION_TRAP: > return handle_trap_exceptions(vcpu, run); > case ARM_EXCEPTION_HYP_GONE: > diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c > index 7cc175c88a37..4282f05771c1 100644 > --- a/arch/arm64/kvm/hyp/switch.c > +++ b/arch/arm64/kvm/hyp/switch.c > @@ -305,33 +305,6 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu) > return true; > } > > -/* Skip an instruction which has been emulated. Returns true if > - * execution can continue or false if we need to exit hyp mode because > - * single-step was in effect. > - */ > -static bool __hyp_text __skip_instr(struct kvm_vcpu *vcpu) > -{ > - *vcpu_pc(vcpu) = read_sysreg_el2(elr); > - > - if (vcpu_mode_is_32bit(vcpu)) { > - vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(spsr); > - kvm_skip_instr32(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); > - write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, spsr); > - } else { > - *vcpu_pc(vcpu) += 4; > - } > - > - write_sysreg_el2(*vcpu_pc(vcpu), elr); > - > - if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { > - vcpu->arch.fault.esr_el2 = > - (ESR_ELx_EC_SOFTSTP_LOW << ESR_ELx_EC_SHIFT) | 0x22; > - return false; > - } else { > - return true; > - } > -} > - > static bool __hyp_text __hyp_switch_fpsimd(struct kvm_vcpu *vcpu) > { > struct user_fpsimd_state *host_fpsimd = vcpu->arch.host_fpsimd_state; > @@ -420,20 +393,12 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) > if (valid) { > int ret = __vgic_v2_perform_cpuif_access(vcpu); > > - if (ret == 1 && __skip_instr(vcpu)) > + if (ret == 1) > return true; > > - if (ret == -1) { > - /* Promote an illegal access to an > - * SError. If we would be returning > - * due to single-step clear the SS > - * bit so handle_exit knows what to > - * do after dealing with the error. > - */ > - if (!__skip_instr(vcpu)) > - *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; > + /* Promote an illegal access to an SError.*/ > + if (ret == -1) > *exit_code = ARM_EXCEPTION_EL1_SERROR; > - } > > goto exit; > } > @@ -444,7 +409,7 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) > kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_CP15_32)) { > int ret = __vgic_v3_perform_cpuif_access(vcpu); > > - if (ret == 1 && __skip_instr(vcpu)) > + if (ret == 1) > return true; > } > > diff --git a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c > index 215c7c0eb3b0..9cbdd034a563 100644 > --- a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c > +++ b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c > @@ -41,7 +41,7 @@ static bool __hyp_text __is_be(struct kvm_vcpu *vcpu) > * Returns: > * 1: GICV access successfully performed > * 0: Not a GICV access > - * -1: Illegal GICV access > + * -1: Illegal GICV access successfully performed > */ > int __hyp_text __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu) > { > @@ -61,12 +61,16 @@ int __hyp_text __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu) > return 0; > > /* Reject anything but a 32bit access */ > - if (kvm_vcpu_dabt_get_as(vcpu) != sizeof(u32)) > + if (kvm_vcpu_dabt_get_as(vcpu) != sizeof(u32)) { > + __kvm_skip_instr(vcpu); > return -1; > + } > > /* Not aligned? Don't bother */ > - if (fault_ipa & 3) > + if (fault_ipa & 3) { > + __kvm_skip_instr(vcpu); > return -1; > + } > > rd = kvm_vcpu_dabt_get_rd(vcpu); > addr = hyp_symbol_addr(kvm_vgic_global_state)->vcpu_hyp_va; > @@ -88,5 +92,7 @@ int __hyp_text __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu) > vcpu_set_reg(vcpu, rd, data); > } > > + __kvm_skip_instr(vcpu); > + > return 1; > } > diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c > index 23774970c9df..4adcee5fc126 100644 > --- a/virt/kvm/arm/arm.c > +++ b/virt/kvm/arm/arm.c > @@ -674,8 +674,6 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) > ret = kvm_handle_mmio_return(vcpu, vcpu->run); > if (ret) > return ret; > - if (kvm_arm_handle_step_debug(vcpu, vcpu->run)) > - return 0; > } > > if (run->immediate_exit) > diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c > index 616e5a433ab0..9652c453480f 100644 > --- a/virt/kvm/arm/hyp/vgic-v3-sr.c > +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c > @@ -1012,8 +1012,10 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) > > esr = kvm_vcpu_get_hsr(vcpu); > if (vcpu_mode_is_32bit(vcpu)) { > - if (!kvm_condition_valid(vcpu)) > + if (!kvm_condition_valid(vcpu)) { > + __kvm_skip_instr(vcpu); > return 1; > + } > > sysreg = esr_cp15_to_sysreg(esr); > } else { > @@ -1123,6 +1125,8 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu) > rt = kvm_vcpu_sys_get_rt(vcpu); > fn(vcpu, vmcr, rt); > > + __kvm_skip_instr(vcpu); > + > return 1; > } -- Alex Benn?e