From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40378) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bqzqy-00019S-Q9 for qemu-devel@nongnu.org; Mon, 03 Oct 2016 05:48:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bqzqu-0006Ld-Le for qemu-devel@nongnu.org; Mon, 03 Oct 2016 05:48:07 -0400 Received: from mail-wm0-x22c.google.com ([2a00:1450:400c:c09::22c]:35274) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bqzqu-0006LP-FE for qemu-devel@nongnu.org; Mon, 03 Oct 2016 05:48:04 -0400 Received: by mail-wm0-x22c.google.com with SMTP id f193so96800432wmg.0 for ; Mon, 03 Oct 2016 02:48:04 -0700 (PDT) References: <20160930213106.20186-1-alex.bennee@linaro.org> <20160930213106.20186-14-alex.bennee@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: Date: Mon, 03 Oct 2016 10:48:02 +0100 Message-ID: <87d1jhu5kd.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 13/15] tcg: ensure cpu_tb_exec/tb_gen_code use atomic_read/write List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: qemu-devel@nongnu.org, mttcg@greensocs.com, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com, mark.burton@greensocs.com, jan.kiszka@siemens.com, serge.fdrv@gmail.com, rth@twiddle.net, peter.maydell@linaro.org, claudio.fontana@huawei.com, Peter Crosthwaite Paolo Bonzini writes: > On 30/09/2016 23:31, Alex Bennée wrote: >> tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]); >> - if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || >> - tb->flags != flags)) { >> + if (unlikely(!tb || atomic_read(&tb->pc) != pc || atomic_read(&tb->cs_base) != cs_base || >> + atomic_read(&tb->flags) != flags)) { > > This should not be necessary (and is responsible for the 64-on-32 > compilation failure). The load of tb from the cache is an acquire > operation, and synchronizes with the corresponding store in > cpu->tb_jmp_cache. Is the C11 spec happy with "plain" accesses after the acquire operation? Unfortunately the sanitizer isn't able to see the indirect acquires effect on the other accesses. > > Paolo -- Alex Bennée