From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anthony Liguori Subject: Re: [PATCH RFC] virtio-pci: new config layout: using memory BAR Date: Wed, 05 Jun 2013 16:53:07 -0500 Message-ID: <87d2s0mdh8.fsf@codemonkey.ws> References: <20130604064216.GD19433@redhat.com> <871u8g67d6.fsf@codemonkey.ws> <20130605140936.GB10604@redhat.com> <87ehcgr3wq.fsf@codemonkey.ws> <20130605151953.GA25987@redhat.com> <87bo7ktvaw.fsf@codemonkey.ws> <20130605162029.GB26561@redhat.com> <87li6obd2r.fsf@codemonkey.ws> <20130605194317.GA30923@redhat.com> <87k3m8qofi.fsf@codemonkey.ws> <20130605211405.GA31928@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Rusty Russell , virtualization@lists.linux-foundation.org, kvm@vger.kernel.org, KONRAD Frederic , Paolo Bonzini , Peter Maydell , Stefan Hajnoczi , gleb@redhat.com, Benjamin Herrenschmidt To: "Michael S. Tsirkin" Return-path: Received: from e36.co.us.ibm.com ([32.97.110.154]:36095 "EHLO e36.co.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932900Ab3FEVxi (ORCPT ); Wed, 5 Jun 2013 17:53:38 -0400 Received: from /spool/local by e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 5 Jun 2013 15:53:37 -0600 Received: from d03relay02.boulder.ibm.com (d03relay02.boulder.ibm.com [9.17.195.227]) by d03dlp01.boulder.ibm.com (Postfix) with ESMTP id 1CE22C40001 for ; Wed, 5 Jun 2013 15:48:23 -0600 (MDT) Received: from d03av04.boulder.ibm.com (d03av04.boulder.ibm.com [9.17.195.170]) by d03relay02.boulder.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r55LreHM129346 for ; Wed, 5 Jun 2013 15:53:40 -0600 Received: from d03av04.boulder.ibm.com (loopback [127.0.0.1]) by d03av04.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r55LrWrq003714 for ; Wed, 5 Jun 2013 15:53:33 -0600 In-Reply-To: <20130605211405.GA31928@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: "Michael S. Tsirkin" writes: > On Wed, Jun 05, 2013 at 03:42:57PM -0500, Anthony Liguori wrote: >> "Michael S. Tsirkin" writes: >> >> Can you explain? I thought the whole trick with separating out the >> virtqueue notification register was to regain the performance? > > Yes but this trick only works well with NPT (it's still a bit > slower than PIO but not so drastically). > Without NPT you still need a page walk so it will be slow. Do you mean NPT/EPT? If your concern is shadow paging, then I think you're concerned about hardware that is so slow to start with that it's not worth considering. >> >> It also maps to what regular hardware does. I highly doubt that there >> >> are any real PCI cards that made the shift from PCI to PCI-e without >> >> bumping at least a revision ID. >> > >> > Only because the chance it's 100% compatible on the software level is 0. >> > It always has some hardware specific quirks. >> > No such excuse here. >> > >> >> It also means we don't need to play games about sometimes enabling IO >> >> bars and sometimes not. >> > >> > This last paragraph is wrong, it ignores the issues 3) to 5) >> > I added above. >> > >> > If you do take them into account: >> > - there are reasons to add MMIO BAR to PCI, >> > even without PCI express >> >> So far, the only reason you've provided is "it doesn't work on some >> architectures." Which architectures? > > PowerPC wants this. Existing PowerPC remaps PIO to MMAP so it works fine today. Future platforms may not do this but future platforms can use a different device. They certainly won't be able to use the existing drivers anyway. Ben, am I wrong here? >> > - we won't be able to drop IO BAR from virtio >> >> An IO BAR is useless if it means we can't have more than 12 devices. > > > It's not useless. A smart BIOS can enable devices one by one as > it tries to boot from them. A smart BIOS can also use MMIO to program virtio. Regards, Anthony Liguori