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From: Jani Nikula <jani.nikula@intel.com>
To: Khaled Almahallawy <khaled.almahallawy@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Khaled Almahallawy <khaled.almahallawy@intel.com>,
	Imre Deak <imre.deak@intel.com>
Subject: Re: [PATCH v3] drm/i915/display: Add link rate and lane count to i915_display_info
Date: Thu, 10 Apr 2025 15:14:47 +0300	[thread overview]
Message-ID: <87ecy0usaw.fsf@intel.com> (raw)
In-Reply-To: <20250409230214.963999-1-khaled.almahallawy@intel.com>

On Wed, 09 Apr 2025, Khaled Almahallawy <khaled.almahallawy@intel.com> wrote:
> Adding link rate and lane count information to i915_display_info makes it
> easier and faster to access this data compared to checking kernel logs.
> This is particularly beneficial for individuals who are not familiar with
> i915 in the following scenarios:
>
> * Debugging DP tunnel bandwidth usage in the Thunderbolt driver.
> * During USB4 certification, it is necessary to know the link rate used by
>   the monitor to prove that the DP tunnel can handle required rates.
> * In PHY CTS, when the connector probes are not mounted correctly,
>   some display lanes may not appear in the DP Oscilloscope, leading to CTS
>   failures.
>
> This change provides validation teams with an easy way to identify and
> troubleshoot issues.
>
> v2: separate seq_printf line (Jani)
> v3: separate output line (Jani)
>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Khaled Almahallawy <khaled.almahallawy@intel.com>

->lane_count is not relevant for all crtc's, but not a big deal.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 8f1f95637e09..ff7419ca7d56 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -555,6 +555,8 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
>  	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
>  		   DRM_RECT_ARG(&crtc_state->pipe_src),
>  		   str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
> +	seq_printf(m, "\tport_clock=%d, lane_count=%d\n",
> +		   crtc_state->port_clock, crtc_state->lane_count);
>  
>  	intel_scaler_info(m, crtc);

-- 
Jani Nikula, Intel

  parent reply	other threads:[~2025-04-10 12:14 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-09 23:02 [PATCH v3] drm/i915/display: Add link rate and lane count to i915_display_info Khaled Almahallawy
2025-04-10  8:09 ` ✓ i915.CI.BAT: success for drm/i915/display: Add link rate and lane count to i915_display_info (rev3) Patchwork
2025-04-10  9:40 ` ✗ i915.CI.Full: failure " Patchwork
2025-04-10 12:14 ` Jani Nikula [this message]
2025-04-15  8:17 ` [PATCH v3] drm/i915/display: Add link rate and lane count to i915_display_info Jani Nikula

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