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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/5] drm/i915: Stop using a 'reg' variable
Date: Thu, 02 Nov 2023 15:29:56 +0200	[thread overview]
Message-ID: <87edh82sh7.fsf@intel.com> (raw)
In-Reply-To: <20231101114212.9345-3-ville.syrjala@linux.intel.com>

On Wed, 01 Nov 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> 'reg' is a very non-descriptive name. Just get rid of the silly
> local variable and spell out the full register name always.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++---------
>  1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1abb81981ef5..751c36679b01 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -397,7 +397,6 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
> -	i915_reg_t reg;
>  	u32 val;
>  
>  	drm_dbg_kms(&dev_priv->drm, "enabling pipe %c\n", pipe_name(pipe));
> @@ -430,16 +429,16 @@ void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
>  		intel_de_rmw(dev_priv, PIPE_ARB_CTL(pipe),
>  			     0, PIPE_ARB_USE_PROG_SLOTS);
>  
> -	reg = TRANSCONF(cpu_transcoder);
> -	val = intel_de_read(dev_priv, reg);
> +	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
>  	if (val & TRANSCONF_ENABLE) {
>  		/* we keep both pipes enabled on 830 */
>  		drm_WARN_ON(&dev_priv->drm, !IS_I830(dev_priv));
>  		return;
>  	}
>  
> -	intel_de_write(dev_priv, reg, val | TRANSCONF_ENABLE);
> -	intel_de_posting_read(dev_priv, reg);
> +	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder),
> +		       val | TRANSCONF_ENABLE);
> +	intel_de_posting_read(dev_priv, TRANSCONF(cpu_transcoder));
>  
>  	/*
>  	 * Until the pipe starts PIPEDSL reads will return a stale value,
> @@ -458,7 +457,6 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
> -	i915_reg_t reg;
>  	u32 val;
>  
>  	drm_dbg_kms(&dev_priv->drm, "disabling pipe %c\n", pipe_name(pipe));
> @@ -469,8 +467,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	 */
>  	assert_planes_disabled(crtc);
>  
> -	reg = TRANSCONF(cpu_transcoder);
> -	val = intel_de_read(dev_priv, reg);
> +	val = intel_de_read(dev_priv, TRANSCONF(cpu_transcoder));
>  	if ((val & TRANSCONF_ENABLE) == 0)
>  		return;
>  
> @@ -485,7 +482,7 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  	if (!IS_I830(dev_priv))
>  		val &= ~TRANSCONF_ENABLE;
>  
> -	intel_de_write(dev_priv, reg, val);
> +	intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), val);
>  
>  	if (DISPLAY_VER(dev_priv) >= 12)
>  		intel_de_rmw(dev_priv, hsw_chicken_trans_reg(dev_priv, cpu_transcoder),

-- 
Jani Nikula, Intel

  reply	other threads:[~2023-11-02 13:30 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-01 11:42 [Intel-gfx] [PATCH 0/5] drm/i915: Some register cleanups Ville Syrjala
2023-11-01 11:42 ` [Intel-gfx] [PATCH 1/5] drm/i915: Extract hsw_chicken_trans_reg() Ville Syrjala
2023-11-02 13:29   ` Jani Nikula
2023-11-01 11:42 ` [Intel-gfx] [PATCH 2/5] drm/i915: Stop using a 'reg' variable Ville Syrjala
2023-11-02 13:29   ` Jani Nikula [this message]
2023-11-01 11:42 ` [Intel-gfx] [PATCH 3/5] drm/i915: Extract mchbar_reg() Ville Syrjala
2023-11-02 13:31   ` Jani Nikula
2023-11-06  8:07     ` Ville Syrjälä
2023-11-01 11:42 ` [Intel-gfx] [PATCH 4/5] drm/i915/dsi: Remove dead GLK checks Ville Syrjala
2023-11-02 13:32   ` Jani Nikula
2023-11-01 11:42 ` [Intel-gfx] [PATCH 5/5] drm/i915/dsi: Extract port_ctrl_reg() Ville Syrjala
2023-11-02 13:32   ` Jani Nikula
2023-11-01 14:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some register cleanups Patchwork
2023-11-01 14:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-01 14:50 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-04 16:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some register cleanups (rev2) Patchwork
2023-11-04 16:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-04 17:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-04 17:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some register cleanups (rev3) Patchwork
2023-11-04 17:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-04 18:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-04 19:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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