From mboxrd@z Thu Jan 1 00:00:00 1970 References: <20210731094934.1799307-1-rpm@xenomai.org> From: Philippe Gerum Subject: Re: [PATCH 0/4] Dovetail fixes (v5.13) In-reply-to: Date: Tue, 03 Aug 2021 08:53:37 +0200 Message-ID: <87eebb589a.fsf@xenomai.org> MIME-Version: 1.0 Content-Type: text/plain List-Id: Discussions about the Xenomai project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Florian Bezdeka Cc: xenomai@xenomai.org Hi Florian, Florian Bezdeka via Xenomai writes: > Hi Philippe, > > On 31.07.21 11:49, Philippe Gerum via Xenomai wrote: >> From: Philippe Gerum >> >> The usual pain with synchronizing the virtual and real interrupt >> states. These issues have been detected while porting to v5.14, some >> are reported by CONFIG_DEBUG_LOCKDEP=y. >> > > One of our test boards (Intel XEON D) has an issue with the TSC being > marked unstable because the clocksource watchdog is coming too late. > Could one of these fixes explain that? Something like missed / dropped > interrupts / interrupts not being delivered to Linux? > I don't think so, these fixes are not supposed to address this kind of issue. They are merely aimed at keeping the interrupt state reported by the IRQ flags tracer in sync with lockdep expectations. This series is not complete yet, more is to come to fully address this matter and more. Booting with CONFIG_DEBUG_LOCKDEP enabled, CONFIG_EVL/CONFIG_XENOMAI disabled (i.e. only keeping the IRQ pipeline on) should reveal the remaining problems. This also revealed a deeper and nastier issue than de-synced IRQ flag tracing, particularly on ARM/arm64 where we do depend on RCU read sides when traversing the interrupt pipeline, an unmet dependency which is currently papered over as a result of having a high-priority interrupt stage enabled in the kernel (e.g. EVL/Xenomai). A fix is under test here. -- Philippe.