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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/18] drm/i915: Combine tasklet_kill and tasklet_disable
Date: Thu, 26 Apr 2018 13:19:14 +0300	[thread overview]
Message-ID: <87efj2z2vx.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <152457292806.12387.2257076999164619305@mail.alporthouse.com>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Quoting Mika Kuoppala (2018-04-24 13:26:11)
>> Chris Wilson <chris@chris-wilson.co.uk> writes:
>> 
>> > Ideally, we want to atomically flush and disable the tasklet before
>> > resetting the GPU. At present, we rely on being the only part to touch
>> > our tasklet and serialisation of the reset process to ensure that we can
>> > suspend the tasklet from the mix of reset/wedge pathways. In this patch,
>> > we move the tasklet abuse into its own function and tweak it such that
>> > we only do a synchronous operation the first time it is disabled around
>> > the reset. This allows us to avoid the sync inside a softirq context in
>> > subsequent patches.
>> >
>> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> > Cc: Michał Winiarski <michal.winiarski@intel.com>
>> > CC: Michel Thierry <michel.thierry@intel.com>
>> > Cc: Jeff McGee <jeff.mcgee@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/intel_lrc.c | 14 +++++++++++---
>> >  1 file changed, 11 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>> > index bbcc6439a2a1..d5640f3d5276 100644
>> > --- a/drivers/gpu/drm/i915/intel_lrc.c
>> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> > @@ -1754,6 +1754,16 @@ static int gen9_init_render_ring(struct intel_engine_cs *engine)
>> >       return init_workarounds_ring(engine);
>> >  }
>> >  
>> > +static void tasklet_kill_and_disable(struct tasklet_struct *t)
>> > +{
>> > +     if (!atomic_read(&t->count))
>> > +             tasklet_kill(t);
>> > +
>> > +     if (atomic_inc_return(&t->count) == 1)
>> > +             tasklet_unlock_wait(t);
>> 
>> You would spin only on the first try regardless. Is this
>> just to prevent one extra spinlock on reset path?
>
> No, the end goal is to prevent a recursive lock.

Ok so you want to be able to call this from inside the
tasklet itself.

On the bigger picture, if the preempt has has already
timeouted and we want to reset, does it matter between
resetting from wq or from timer irq. In another
words what do we gain for this much of added complexity?
-Mika


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  reply	other threads:[~2018-04-26 10:19 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-09 11:13 Still trying for context->preempt_timeout Chris Wilson
2018-04-09 11:13 ` [PATCH 01/18] drm/i915/execlists: Set queue priority from secondary port Chris Wilson
2018-04-10 14:05   ` Tvrtko Ursulin
     [not found]     ` <152337025293.3167.10189866034675290387@mail.alporthouse.com>
2018-04-10 14:42       ` Tvrtko Ursulin
2018-04-10 14:56         ` Chris Wilson
2018-04-10 15:08           ` Chris Wilson
     [not found]           ` <87af1b35-ba87-f560-c911-0e758a164909@linux.intel.com>
     [not found]             ` <152344296759.13225.4187833354912190018@mail.alporthouse.com>
     [not found]               ` <aa0e24bb-045c-e1c9-24bc-6dba0b4a28b8@linux.intel.com>
2018-04-11 11:33                 ` Chris Wilson
2018-04-09 11:13 ` [PATCH 02/18] drm/i915/execlists: Refactor out complete_preempt_context() Chris Wilson
2018-04-09 11:13 ` [PATCH 03/18] drm/i915: Move engine reset prepare/finish to backends Chris Wilson
2018-04-09 11:13 ` [PATCH 04/18] drm/i915: Split execlists/guc reset preparations Chris Wilson
2018-04-09 11:14 ` [PATCH 05/18] drm/i915/execlists: Flush pending preemption events during reset Chris Wilson
2018-04-09 11:14 ` [PATCH 06/18] drm/i915/breadcrumbs: Keep the fake irq armed across reset Chris Wilson
2018-04-23 13:03   ` Mika Kuoppala
2018-04-23 14:53     ` Chris Wilson
2018-04-24 11:06       ` Mika Kuoppala
2018-04-09 11:14 ` [PATCH 07/18] drm/i915: Combine tasklet_kill and tasklet_disable Chris Wilson
2018-04-24 12:26   ` Mika Kuoppala
2018-04-24 12:28     ` Chris Wilson
2018-04-26 10:19       ` Mika Kuoppala [this message]
2018-04-26 10:26         ` Chris Wilson
2018-04-09 11:14 ` [PATCH 08/18] drm/i915: Stop parking the signaler around reset Chris Wilson
2018-04-09 11:14 ` [PATCH 09/18] drm/i915: Be irqsafe inside reset Chris Wilson
2018-04-09 11:14 ` [PATCH 10/18] drm/i915/execlists: Make submission tasklet hardirq safe Chris Wilson
2018-04-09 11:14 ` [PATCH 11/18] drm/i915/guc: " Chris Wilson
2018-04-09 11:14 ` [PATCH 12/18] drm/i915: Allow init_breadcrumbs to be used from irq context Chris Wilson
2018-04-09 11:14 ` [PATCH 13/18] drm/i915: Compile out engine debug for release Chris Wilson
2018-04-26 10:15   ` Mika Kuoppala
2018-04-09 11:14 ` [PATCH 14/18] drm/i915/execlists: Force preemption via reset on timeout Chris Wilson
2018-04-09 11:14 ` [PATCH 15/18] drm/i915/execlists: Try preempt-reset from hardirq timer context Chris Wilson
2018-04-09 11:14 ` [PATCH 16/18] drm/i915/preemption: Select timeout when scheduling Chris Wilson
2018-04-09 11:14 ` [PATCH 17/18] drm/i915: Use a preemption timeout to enforce interactivity Chris Wilson
2018-04-09 11:14 ` [PATCH 18/18] drm/i915: Allow user control over preempt timeout on their important context Chris Wilson
2018-04-09 11:29 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/18] drm/i915/execlists: Set queue priority from secondary port Patchwork
2018-04-09 11:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-09 13:08 ` ✗ Fi.CI.IGT: failure " Patchwork

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