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Fri, 30 Oct 2026 05:54:24 -0700 (PDT) Received: from draig.lan ([185.124.0.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4abf60f1076sm62424045e9.6.2026.10.30.05.54.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 05:54:23 -0700 (PDT) Received: from draig (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 8E30C5F7FD; Fri, 30 Oct 2026 12:54:22 +0000 (GMT) From: =?utf-8?Q?Alex_Benn=C3=A9e?= To: Richard Henderson Cc: qemu-devel@nongnu.org, Paolo Bonzini Subject: Re: [RFC PATCH] target/i386: terminate a tcg block on gen_RDMSR In-Reply-To: <451d1cfb-a94e-40c1-bb10-a768c5701f9b@linaro.org> (Richard Henderson's message of "Fri, 30 Oct 2026 06:37:07 -0500") References: <20261029171737.2126803-1-alex.bennee@linaro.org> <451d1cfb-a94e-40c1-bb10-a768c5701f9b@linaro.org> User-Agent: mu4e 1.14.4; emacs 30.1 Date: Fri, 30 Oct 2026 12:54:22 +0000 Message-ID: <87fqxn8i2p.fsf@draig.linaro.org> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-20.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Richard Henderson writes: > On 10/29/26 12:17, Alex Benn=C3=A9e wrote: >> End the block the same way that gen_WRMSR does so an IO access under >> icount. While this fixes this particular case I suspect there are more >> IO like accesses the x86 TCG front-end should take care off. >> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4779 >> Signed-off-by: Alex Benn=C3=A9e >> --- >> target/i386/tcg/emit.c.inc | 1 + >> 1 file changed, 1 insertion(+) >> diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc >> index ed56edf8a3a..911bce5f539 100644 >> --- a/target/i386/tcg/emit.c.inc >> +++ b/target/i386/tcg/emit.c.inc >> @@ -3783,6 +3783,7 @@ static void gen_RDMSR(DisasContext *s, X86DecodedI= nsn *decode) >> gen_update_cc_op(s); >> gen_update_eip_cur(s); >> gen_helper_rdmsr(tcg_env); >> + s->base.is_jmp =3D DISAS_EOB_NEXT; >> } >> #else >> #define gen_RDMSR gen_unreachable > > You've done nothing to update state. I think you want > > translator_io_start(&s->base); > > which will go though DISAS_TOO_MANY. Should WRMSR do the same? If not why is it different? > > > r~ --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro