From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3088D3DD50D for ; Fri, 29 May 2026 21:14:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780089277; cv=none; b=Yb2nASrOM8lv8bBzkGYN1NX26lQsf34fKT6p2lvy1k7Ekgx+HwpYvcFYpGpuEBYMczHUAPBi4mJ2optb9+AC75LEzjy7ET6CGzibw3zU4Wkd5xceis6cqtWZ2NASH/EGtJjguaMeA2nRrZACs3HgD1yEAHyJxUoGiVABAYp+smo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780089277; c=relaxed/simple; bh=NstQ8enzQqMcZVJtpYCfVzFNE0rLXpUEpekolnuyui4=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=Zvbr2L7t8Lovc/I4ddbRbGLP4+Ebro7JTbSNUJ2ePj4LCuy/uS6AEMVJspjoKYIK9/ZuEBqfgtcNYltbIq9HqTPPYyF7PczoHqVloJZH2nnLZ3o0EybgeTcQuhiiT3YoSHIF+TKreKQ3yq2Kowl7upSdO4PaYc9Ki1u68uTDZzM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YCMHa1BQ; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YCMHa1BQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 243FA1F00893; Fri, 29 May 2026 21:14:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1780089275; bh=afLX9juUrAYf2DaUmqCH3NkpHfWEEak7e9k7LrcTQgU=; h=From:To:Cc:Subject:In-Reply-To:References:Date; b=YCMHa1BQXeg20qIYiQt0BTYTz5vqoMnz03HaI3FCiWtJh5zAjxKD8n+i8lpdqpZeZ J/9c7bc96j/1BuFWMhg13d0S7KpdsQfKrO4znS7NQhEmV+YWcBd6ORPy7LmbP80uuw 5pz8OfEURlaXfPBvrZGUgpLZEgzZt4BVB1Zv548MvGTmJcTwy4ue+8FhDJrLUasUBL zNX4g+ibTZINqUTfwkPKX50Fbh8uEbvcMMKTj5TDCZ4CY9FlwK5XJTwF/6z8snwigA spBudnSr8Tc3mdTIjatDrgCFklLyq/fiqB06VvTYzCVtYW4qTzAL6bxeuNjovToIn2 fqn3Cly4ElqsA== From: Thomas Gleixner To: =?utf-8?Q?Andr=C3=A9?= Almeida Cc: Mathieu Desnoyers , Sebastian Andrzej Siewior , Carlos O'Donell , Peter Zijlstra , Florian Weimer , Rich Felker , Torvald Riegel , Darren Hart , Ingo Molnar , LKML , Davidlohr Bueso , Arnd Bergmann , "Liam R . Howlett" , Uros Bizjak , Thomas =?utf-8?Q?Wei=C3=9Fschuh?= Subject: Re: [patch V4 10/14] futex: Provide infrastructure to plug the non contended robust futex unlock race In-Reply-To: <9d6149b3-d153-4aba-ac66-38ce6b8d8e16@igalia.com> References: <20260402151131.876492985@kernel.org> <20260402151940.282021578@kernel.org> <9d6149b3-d153-4aba-ac66-38ce6b8d8e16@igalia.com> Date: Fri, 29 May 2026 23:14:32 +0200 Message-ID: <87fr399avb.ffs@fw13> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, May 27 2026 at 22:08, Andr=C3=A9 Almeida wrote: > Em 02/04/2026 12:21, Thomas Gleixner escreveu: >> + /* >> + * Avoid dereferencing current->mm if not returning from interrupt. >> + * current->rseq.event is going to be used subsequently, so bringing t= he >> + * cache line in is not a big deal. >> + */ >> + if (!current->rseq.event.user_irq) >> + return; >> + > > For some reason, this if is always true for aarch64. I had to remove it=20 > in order to make the test work. Any idea why? No. That looks like a bug on the arm64 side.