From: Markus Armbruster <armbru@redhat.com>
To: "Naveen N Rao (AMD)" <naveen@kernel.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
qemu-devel <qemu-devel@nongnu.org>, <kvm@vger.kernel.org>,
"Daniel P. Berrange" <berrange@redhat.com>,
Eduardo Habkost <eduardo@habkost.net>,
Eric Blake <eblake@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Zhao Liu <zhao1.liu@intel.com>,
Nikunj A Dadhania <nikunj@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Michael Roth <michael.roth@amd.com>,
Neeraj Upadhyay <neeraj.upadhyay@amd.com>,
Roy Hopkins <roy.hopkins@randomman.co.uk>,
Ketan Chaturvedi <Ketan.Chaturvedi@amd.com>
Subject: Re: [RFC PATCH 6/7] target/i386: SEV: Add support for setting TSC frequency for Secure TSC
Date: Fri, 12 Sep 2025 13:22:23 +0200 [thread overview]
Message-ID: <87frcr9aq8.fsf@pond.sub.org> (raw)
In-Reply-To: <23a293fca3e2ac22c7da052123e27c2794f40932.1757589490.git.naveen@kernel.org> (Naveen N. Rao's message of "Thu, 11 Sep 2025 17:24:25 +0530")
"Naveen N Rao (AMD)" <naveen@kernel.org> writes:
> Add support for configuring the TSC frequency when Secure TSC is enabled
> in SEV-SNP guests through a new "tsc-frequency" property on SEV-SNP
> guest objects, similar to the vCPU-specific property used by regular
> guests and TDX. A new property is needed since SEV-SNP guests require
> the TSC frequency to be specified during early SNP_LAUNCH_START command
> before any vCPUs are created.
>
> The user-provided TSC frequency is set through KVM_SET_TSC_KHZ before
> issuing KVM_SEV_SNP_LAUNCH_START.
>
> Co-developed-by: Ketan Chaturvedi <Ketan.Chaturvedi@amd.com>
> Signed-off-by: Ketan Chaturvedi <Ketan.Chaturvedi@amd.com>
> Co-developed-by: Nikunj A Dadhania <nikunj@amd.com>
> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
> Signed-off-by: Naveen N Rao (AMD) <naveen@kernel.org>
[...]
> diff --git a/qapi/qom.json b/qapi/qom.json
> index b05a475ef499..5b99148cb790 100644
> --- a/qapi/qom.json
> +++ b/qapi/qom.json
> @@ -1102,6 +1102,9 @@
> #
> # @secure-tsc: enable Secure TSC (default: false) (since 10.2)
> #
> +# @tsc-frequency: set secure TSC frequency. Only valid if Secure TSC
> +# is enabled (default: zero) (since 10.2)
Two spaces between sentences for consistency, please.
> +#
> # Since: 9.1
> ##
> { 'struct': 'SevSnpGuestProperties',
> @@ -1114,7 +1117,8 @@
> '*author-key-enabled': 'bool',
> '*host-data': 'str',
> '*vcek-disabled': 'bool',
> - '*secure-tsc': 'bool' } }
> + '*secure-tsc': 'bool',
> + '*tsc-frequency': 'uint32' } }
>
> ##
> # @TdxGuestProperties:
next prev parent reply other threads:[~2025-09-12 11:22 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 11:54 [RFC PATCH 0/7] target/i386: SEV: Add support for enabling VMSA SEV features Naveen N Rao (AMD)
2025-09-11 11:54 ` [RFC PATCH 1/7] target/i386: SEV: Consolidate SEV feature validation to common init path Naveen N Rao (AMD)
2025-09-12 13:39 ` Tom Lendacky
2025-09-15 14:19 ` Naveen N Rao
2025-09-11 11:54 ` [RFC PATCH 2/7] target/i386: SEV: Validate that SEV-ES is enabled when VMSA features are used Naveen N Rao (AMD)
2025-09-12 13:40 ` Tom Lendacky
2025-09-11 11:54 ` [RFC PATCH 3/7] target/i386: SEV: Add support for enabling debug-swap SEV feature Naveen N Rao (AMD)
2025-09-12 11:20 ` Markus Armbruster
2025-09-15 14:25 ` Naveen N Rao
2025-09-16 12:46 ` Markus Armbruster
2025-09-16 15:03 ` Daniel P. Berrangé
2025-09-12 13:50 ` Tom Lendacky
2025-09-15 14:25 ` Naveen N Rao
2025-09-11 11:54 ` [RFC PATCH 4/7] target/i386: SEV: Enable use of KVM_SEV_INIT2 for SEV-ES guests Naveen N Rao (AMD)
2025-09-11 11:54 ` [RFC PATCH 5/7] target/i386: SEV: Add support for enabling Secure TSC SEV feature Naveen N Rao (AMD)
2025-09-12 14:14 ` Tom Lendacky
2025-09-11 11:54 ` [RFC PATCH 6/7] target/i386: SEV: Add support for setting TSC frequency for Secure TSC Naveen N Rao (AMD)
2025-09-12 11:22 ` Markus Armbruster [this message]
2025-09-11 11:54 ` [RFC PATCH 7/7] target/i386: SEV: Add support for enabling Secure AVIC SEV feature Naveen N Rao (AMD)
2025-09-12 14:17 ` Tom Lendacky
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