From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 6/6] drm/i915: Wait for VLV/CHV/BXT/GLK DSI panel power cycle delay on reboot
Date: Tue, 06 Oct 2020 12:31:57 +0300 [thread overview]
Message-ID: <87ft6rk8du.fsf@intel.com> (raw)
In-Reply-To: <20201001151640.14590-6-ville.syrjala@linux.intel.com>
On Thu, 01 Oct 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> As with eDP and LVDS we should also respect the power cycle
> delay on DSI panels. We are not using the power sequencer
> for these, and we have no optimizations around the sleep
> duration, so we just msleep() the whole thing away.
>
> Note that the ICL+ DSI code doesn't seem to have any power
> off/power cycle delay handling whatsoever. The only thing it
> handles is the power on delay. As that looks pretty busted
> in general I won't bother dealing with it for the time being.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Better than nothing.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/vlv_dsi.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 5e5522923b1e..d52f9c177908 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -985,6 +985,13 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state,
> intel_dsi_msleep(intel_dsi, intel_dsi->panel_pwr_cycle_delay);
> }
>
> +static void intel_dsi_shutdown(struct intel_encoder *encoder)
> +{
> + struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> +
> + intel_dsi_msleep(intel_dsi, intel_dsi->panel_pwr_cycle_delay);
> +}
> +
> static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
> enum pipe *pipe)
> {
> @@ -1843,6 +1850,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
> intel_encoder->get_hw_state = intel_dsi_get_hw_state;
> intel_encoder->get_config = intel_dsi_get_config;
> intel_encoder->update_pipe = intel_panel_update_backlight;
> + intel_encoder->shutdown = intel_dsi_shutdown;
>
> intel_connector->get_hw_state = intel_connector_get_hw_state;
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-10-06 9:31 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-01 15:16 [Intel-gfx] [PATCH v2 1/6] drm/i915: Shut down displays gracefully on reboot Ville Syrjala
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 2/6] drm/i915: Add an encoder .shutdown() hook Ville Syrjala
2020-10-06 9:15 ` Jani Nikula
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 3/6] drm/i915: Replace the VLV/CHV eDP reboot notifier with the " Ville Syrjala
2020-10-06 9:29 ` Jani Nikula
2020-10-06 13:43 ` Ville Syrjälä
2020-10-06 18:13 ` Jani Nikula
2020-10-06 18:33 ` Ville Syrjälä
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 4/6] drm/i915: Wait for eDP panel power cycle delay on reboot on all platforms Ville Syrjala
2020-10-06 9:30 ` Jani Nikula
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 5/6] drm/i915: Wait for LVDS panel power cycle delay on reboot Ville Syrjala
2020-10-06 9:31 ` Jani Nikula
2020-10-01 15:16 ` [Intel-gfx] [PATCH v2 6/6] drm/i915: Wait for VLV/CHV/BXT/GLK DSI " Ville Syrjala
2020-10-06 9:31 ` Jani Nikula [this message]
2020-10-01 15:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/6] drm/i915: Shut down displays gracefully " Patchwork
2020-10-01 15:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-01 17:28 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-06 9:14 ` [Intel-gfx] [PATCH v2 1/6] " Jani Nikula
2020-10-06 9:58 ` Chris Wilson
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