From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0C6EC10F25 for ; Wed, 11 Mar 2020 06:09:30 +0000 (UTC) Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.kernel.org (Postfix) with SMTP id 30DCA20873 for ; Wed, 11 Mar 2020 06:09:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=axtens.net header.i=@axtens.net header.b="G897H7G6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 30DCA20873 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=axtens.net Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kernel-hardening-return-18122-kernel-hardening=archiver.kernel.org@lists.openwall.com Received: (qmail 3557 invoked by uid 550); 11 Mar 2020 06:09:24 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Received: (qmail 3525 invoked from network); 11 Mar 2020 06:09:23 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axtens.net; s=google; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=c3Eiiej5Gd50RgJzhEkTBuJdhTagholM7xl6YJq93Wc=; b=G897H7G6bgR0g37t/Ahjg9iWtOVLHQ45HUjIMfy5R86tdnfi2m+1gm0dvbZIZN3r34 lMh6wsG9Vn59M5Axy9XIZfguX7fQQ5ycjwShWBHoC58Bvwny9Ulg6w6stDe213nVm/Hh Ue+3KiaQAWNLB0erF0LxuqzHWhUCe/X6DSvCo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=c3Eiiej5Gd50RgJzhEkTBuJdhTagholM7xl6YJq93Wc=; b=LqywqWLx1qWAi7XPJ8dKfDawL+bkoIWeKxuKxYW86zx4j7c7EBYpxrgSoy3A5eZ7v1 bhTivcf9iUEMYGtxPH5Nz4gzjYgO/6GDvIGPrlBLx4Q91Hoe2nlTINazDH6VoQwqluNR mzctr/oM5mYshaWRuyycsNFN/Nixo/XR6pWL5yyWDSwJkwTq59p/CwCDB+9TyufLgaUN MyWRgyyRsplFM+5aU6kyEhBzNfVGaebd6LJLwU8rykJUK2peDjzmmMLOTINZizBMvCEI G/6dUbdCqYT8+X+q9gnS8BEYlgfSth3XVNdRaSDGOt2uxz599ur/pOoVeizvNjtTy+/6 RywQ== X-Gm-Message-State: ANhLgQ0KcN+igLHd+f7HQG+H6CyosVzNFYCHboOjrfQOMVbvsCV0rtoD mPpb2aMCeJ72cfH9tSPEp5QuAA== X-Google-Smtp-Source: ADFU+vuwePZ+DKPOfje510A10zOjIQNZMI/9v60ebhVo5DxHHMt3CmnKG/pLsVt0bP3YV5NxhSiCpw== X-Received: by 2002:a17:902:8a88:: with SMTP id p8mr1562296plo.179.1583906951963; Tue, 10 Mar 2020 23:09:11 -0700 (PDT) From: Daniel Axtens To: Russell Currey , linuxppc-dev@lists.ozlabs.org Cc: Christophe Leroy , joel@jms.id.au, mpe@ellerman.id.au, ajd@linux.ibm.com, npiggin@gmail.com, kernel-hardening@lists.openwall.com, kbuild test robot , Russell Currey Subject: Re: [PATCH v6 6/7] powerpc/mm: implement set_memory_attr() In-Reply-To: <20200310010338.21205-7-ruscur@russell.cc> References: <20200310010338.21205-1-ruscur@russell.cc> <20200310010338.21205-7-ruscur@russell.cc> Date: Wed, 11 Mar 2020 17:09:07 +1100 Message-ID: <87ftefpgn0.fsf@dja-thinkpad.axtens.net> MIME-Version: 1.0 Content-Type: text/plain Russell Currey writes: > From: Christophe Leroy > > In addition to the set_memory_xx() functions which allows to change > the memory attributes of not (yet) used memory regions, implement a > set_memory_attr() function to: > - set the final memory protection after init on currently used > kernel regions. > - enable/disable kernel memory regions in the scope of DEBUG_PAGEALLOC. > > Unlike the set_memory_xx() which can act in three step as the regions > are unused, this function must modify 'on the fly' as the kernel is > executing from them. At the moment only PPC32 will use it and changing > page attributes on the fly is not an issue. > > Signed-off-by: Christophe Leroy > Reported-by: kbuild test robot > [ruscur: cast "data" to unsigned long instead of int] > Signed-off-by: Russell Currey > --- > arch/powerpc/include/asm/set_memory.h | 2 ++ > arch/powerpc/mm/pageattr.c | 33 +++++++++++++++++++++++++++ > 2 files changed, 35 insertions(+) > > diff --git a/arch/powerpc/include/asm/set_memory.h b/arch/powerpc/include/asm/set_memory.h > index 64011ea444b4..b040094f7920 100644 > --- a/arch/powerpc/include/asm/set_memory.h > +++ b/arch/powerpc/include/asm/set_memory.h > @@ -29,4 +29,6 @@ static inline int set_memory_x(unsigned long addr, int numpages) > return change_memory_attr(addr, numpages, SET_MEMORY_X); > } > > +int set_memory_attr(unsigned long addr, int numpages, pgprot_t prot); > + > #endif > diff --git a/arch/powerpc/mm/pageattr.c b/arch/powerpc/mm/pageattr.c > index 748fa56d9db0..60139fedc6cc 100644 > --- a/arch/powerpc/mm/pageattr.c > +++ b/arch/powerpc/mm/pageattr.c > @@ -77,3 +77,36 @@ int change_memory_attr(unsigned long addr, int numpages, long action) > > return apply_to_page_range(&init_mm, start, sz, change_page_attr, (void *)action); > } > + > +/* > + * Set the attributes of a page: > + * > + * This function is used by PPC32 at the end of init to set final kernel memory > + * protection. It includes changing the maping of the page it is executing from > + * and data pages it is using. > + */ > +static int set_page_attr(pte_t *ptep, unsigned long addr, void *data) > +{ > + pgprot_t prot = __pgprot((unsigned long)data); > + > + spin_lock(&init_mm.page_table_lock); > + > + set_pte_at(&init_mm, addr, ptep, pte_modify(*ptep, prot)); > + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); > + > + spin_unlock(&init_mm.page_table_lock); > + > + return 0; > +} > + > +int set_memory_attr(unsigned long addr, int numpages, pgprot_t prot) > +{ > + unsigned long start = ALIGN_DOWN(addr, PAGE_SIZE); > + unsigned long sz = numpages * PAGE_SIZE; > + > + if (!numpages) > + return 0; > + > + return apply_to_page_range(&init_mm, start, sz, set_page_attr, > + (void *)pgprot_val(prot)); This should probably use apply_to_existing_page_range as well. Regards, Daniel > +} > -- > 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0608C10F25 for ; Wed, 11 Mar 2020 06:10:31 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2613520873 for ; Wed, 11 Mar 2020 06:10:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=axtens.net header.i=@axtens.net header.b="G897H7G6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2613520873 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=axtens.net Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48chQY0nRLzDqbY for ; Wed, 11 Mar 2020 17:10:29 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=axtens.net (client-ip=209.85.214.194; helo=mail-pl1-f194.google.com; envelope-from=dja@axtens.net; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=axtens.net Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=axtens.net header.i=@axtens.net header.a=rsa-sha256 header.s=google header.b=G897H7G6; dkim-atps=neutral Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48chPC4LCmzDqBc for ; Wed, 11 Mar 2020 17:09:13 +1100 (AEDT) Received: by mail-pl1-f194.google.com with SMTP id w12so559755pll.13 for ; Tue, 10 Mar 2020 23:09:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axtens.net; s=google; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=c3Eiiej5Gd50RgJzhEkTBuJdhTagholM7xl6YJq93Wc=; b=G897H7G6bgR0g37t/Ahjg9iWtOVLHQ45HUjIMfy5R86tdnfi2m+1gm0dvbZIZN3r34 lMh6wsG9Vn59M5Axy9XIZfguX7fQQ5ycjwShWBHoC58Bvwny9Ulg6w6stDe213nVm/Hh Ue+3KiaQAWNLB0erF0LxuqzHWhUCe/X6DSvCo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=c3Eiiej5Gd50RgJzhEkTBuJdhTagholM7xl6YJq93Wc=; b=HKR4bB83Yc1L8wmzcpdLQJToaHyFpvPCsoyCZVDQUf8eRxk1CN0Z4OXmavXx7ndkfD zQE9roSnY8O+7jwKGFpiw7RNod5/V7Fva8+kZz2kdkT3DJZJEh8jbLsKw/eetxRwe7/F UdZmuHSOIBQfo9yRtzYyNFvLErW4gS9fKY8YwXp1SaWMoTtBZMJM6fD57uuSwdeijC0s A0poNLFLtjJbxpgoojQ+nKdaOzHQmyJf8sBEFkKKdCVLgX7QiYkcQybdo7+H+USistl1 mZtPAmI2+a6zkX++DKV/hxHv0sFCNgiqe9zfdu7m25CQX8t48i2v6oVb0FiC25W3dTF8 CijQ== X-Gm-Message-State: ANhLgQ3CldHUJwwWOl8EHw46POyOUlUZhEC/MabCeddCn+ZA2nUI3Oj/ 7i4jWMAMK6EHAWu+udZ79N+1Aw== X-Google-Smtp-Source: ADFU+vuwePZ+DKPOfje510A10zOjIQNZMI/9v60ebhVo5DxHHMt3CmnKG/pLsVt0bP3YV5NxhSiCpw== X-Received: by 2002:a17:902:8a88:: with SMTP id p8mr1562296plo.179.1583906951963; Tue, 10 Mar 2020 23:09:11 -0700 (PDT) Received: from localhost (2001-44b8-1113-6700-05c2-72f4-ac61-bc44.static.ipv6.internode.on.net. [2001:44b8:1113:6700:5c2:72f4:ac61:bc44]) by smtp.gmail.com with ESMTPSA id l25sm48398041pgn.47.2020.03.10.23.09.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Mar 2020 23:09:11 -0700 (PDT) From: Daniel Axtens To: Russell Currey , linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v6 6/7] powerpc/mm: implement set_memory_attr() In-Reply-To: <20200310010338.21205-7-ruscur@russell.cc> References: <20200310010338.21205-1-ruscur@russell.cc> <20200310010338.21205-7-ruscur@russell.cc> Date: Wed, 11 Mar 2020 17:09:07 +1100 Message-ID: <87ftefpgn0.fsf@dja-thinkpad.axtens.net> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ajd@linux.ibm.com, kernel-hardening@lists.openwall.com, npiggin@gmail.com, joel@jms.id.au, kbuild test robot Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Russell Currey writes: > From: Christophe Leroy > > In addition to the set_memory_xx() functions which allows to change > the memory attributes of not (yet) used memory regions, implement a > set_memory_attr() function to: > - set the final memory protection after init on currently used > kernel regions. > - enable/disable kernel memory regions in the scope of DEBUG_PAGEALLOC. > > Unlike the set_memory_xx() which can act in three step as the regions > are unused, this function must modify 'on the fly' as the kernel is > executing from them. At the moment only PPC32 will use it and changing > page attributes on the fly is not an issue. > > Signed-off-by: Christophe Leroy > Reported-by: kbuild test robot > [ruscur: cast "data" to unsigned long instead of int] > Signed-off-by: Russell Currey > --- > arch/powerpc/include/asm/set_memory.h | 2 ++ > arch/powerpc/mm/pageattr.c | 33 +++++++++++++++++++++++++++ > 2 files changed, 35 insertions(+) > > diff --git a/arch/powerpc/include/asm/set_memory.h b/arch/powerpc/include/asm/set_memory.h > index 64011ea444b4..b040094f7920 100644 > --- a/arch/powerpc/include/asm/set_memory.h > +++ b/arch/powerpc/include/asm/set_memory.h > @@ -29,4 +29,6 @@ static inline int set_memory_x(unsigned long addr, int numpages) > return change_memory_attr(addr, numpages, SET_MEMORY_X); > } > > +int set_memory_attr(unsigned long addr, int numpages, pgprot_t prot); > + > #endif > diff --git a/arch/powerpc/mm/pageattr.c b/arch/powerpc/mm/pageattr.c > index 748fa56d9db0..60139fedc6cc 100644 > --- a/arch/powerpc/mm/pageattr.c > +++ b/arch/powerpc/mm/pageattr.c > @@ -77,3 +77,36 @@ int change_memory_attr(unsigned long addr, int numpages, long action) > > return apply_to_page_range(&init_mm, start, sz, change_page_attr, (void *)action); > } > + > +/* > + * Set the attributes of a page: > + * > + * This function is used by PPC32 at the end of init to set final kernel memory > + * protection. It includes changing the maping of the page it is executing from > + * and data pages it is using. > + */ > +static int set_page_attr(pte_t *ptep, unsigned long addr, void *data) > +{ > + pgprot_t prot = __pgprot((unsigned long)data); > + > + spin_lock(&init_mm.page_table_lock); > + > + set_pte_at(&init_mm, addr, ptep, pte_modify(*ptep, prot)); > + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); > + > + spin_unlock(&init_mm.page_table_lock); > + > + return 0; > +} > + > +int set_memory_attr(unsigned long addr, int numpages, pgprot_t prot) > +{ > + unsigned long start = ALIGN_DOWN(addr, PAGE_SIZE); > + unsigned long sz = numpages * PAGE_SIZE; > + > + if (!numpages) > + return 0; > + > + return apply_to_page_range(&init_mm, start, sz, set_page_attr, > + (void *)pgprot_val(prot)); This should probably use apply_to_existing_page_range as well. Regards, Daniel > +} > -- > 2.25.1