Re: [PATCH v2 1/3] drm/vc4: Expose gamma as atomic property

From: Eric Anholt <eric@anholt.net>
Cc: airlied@linux.ie, linux-rpi-kernel@lists.infradead.org,
	dri-devel@lists.freedesktop.org,
	Stefan Schake <stschake@gmail.com>
Subject: Re: [PATCH v2 1/3] drm/vc4: Expose gamma as atomic property
Date: Fri, 30 Mar 2018 09:05:32 -0700	[thread overview]
Message-ID: <87fu4hwnub.fsf@anholt.net> (raw)
In-Reply-To: <20180325015240.75464-3-stschake@gmail.com>

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Stefan Schake <stschake@gmail.com> writes:

> We are an atomic driver so the gamma LUT should also be exposed as a
> CRTC property through the DRM atomic color management. This will also
> take care of the legacy path for us.
>
> Signed-off-by: Stefan Schake <stschake@gmail.com>
> ---
> v2: Use drm_color_lut_size for LUT length
>
>  drivers/gpu/drm/vc4/vc4_crtc.c | 24 +++++++++++++-----------
>  1 file changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
> index bf4667481935..239215cb3274 100644
> --- a/drivers/gpu/drm/vc4/vc4_crtc.c
> +++ b/drivers/gpu/drm/vc4/vc4_crtc.c
> @@ -298,23 +298,21 @@ vc4_crtc_lut_load(struct drm_crtc *crtc)
>  		HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_b[i]);
>  }
>  
> -static int
> -vc4_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
> -		   uint32_t size,
> -		   struct drm_modeset_acquire_ctx *ctx)
> +static void
> +vc4_crtc_update_gamma_lut(struct drm_crtc *crtc)
>  {
>  	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
> +	struct drm_color_lut *lut = crtc->state->gamma_lut->data;
> +	u32 length = drm_color_lut_size(crtc->state->gamma_lut);
>  	u32 i;
>  
> -	for (i = 0; i < size; i++) {
> -		vc4_crtc->lut_r[i] = r[i] >> 8;
> -		vc4_crtc->lut_g[i] = g[i] >> 8;
> -		vc4_crtc->lut_b[i] = b[i] >> 8;
> +	for (i = 0; i < length; i++) {
> +		vc4_crtc->lut_r[i] = drm_color_lut_extract(lut[i].red, 8);
> +		vc4_crtc->lut_g[i] = drm_color_lut_extract(lut[i].green, 8);
> +		vc4_crtc->lut_b[i] = drm_color_lut_extract(lut[i].blue, 8);
>  	}
>  
>  	vc4_crtc_lut_load(crtc);
> -
> -	return 0;
>  }
>  
>  static u32 vc4_get_fifo_full_level(u32 format)
> @@ -699,6 +697,9 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
>  	if (crtc->state->active && old_state->active)
>  		vc4_crtc_update_dlist(crtc);
>  
> +	if (crtc->state->color_mgmt_changed && crtc->state->gamma_lut)
> +		vc4_crtc_update_gamma_lut(crtc);

Don't we need to set things back to linear if gamma_lut is NULL?  (maybe
by updating the SCALER_DISPBKGND_GAMMA flag on the HVS channel) 

Other than that, this looks great.

> +
>  	if (debug_dump_regs) {
>  		DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
>  		vc4_hvs_dump_state(dev);
> @@ -909,7 +910,7 @@ static const struct drm_crtc_funcs vc4_crtc_funcs = {
>  	.reset = vc4_crtc_reset,
>  	.atomic_duplicate_state = vc4_crtc_duplicate_state,
>  	.atomic_destroy_state = vc4_crtc_destroy_state,
> -	.gamma_set = vc4_crtc_gamma_set,
> +	.gamma_set = drm_atomic_helper_legacy_gamma_set,
>  	.enable_vblank = vc4_enable_vblank,
>  	.disable_vblank = vc4_disable_vblank,
>  };
> @@ -1035,6 +1036,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
>  	primary_plane->crtc = crtc;
>  	vc4_crtc->channel = vc4_crtc->data->hvs_channel;
>  	drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
> +	drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size);
>  
>  	/* Set up some arbitrary number of planes.  We're not limited
>  	 * by a set number of physical registers, just the space in
> -- 
> 2.14.1

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