From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39387) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai33h-00065N-SI for qemu-devel@nongnu.org; Mon, 21 Mar 2016 12:52:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ai33c-0007zu-Hv for qemu-devel@nongnu.org; Mon, 21 Mar 2016 12:52:01 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:45205) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai33c-0007z4-5S for qemu-devel@nongnu.org; Mon, 21 Mar 2016 12:51:56 -0400 From: =?utf-8?Q?Llu=C3=ADs_Vilanova?= References: <145625172744.12025.2350972792125742783.stgit@localhost> <145625173880.12025.6630606700468410319.stgit@localhost> <8737rorjsj.fsf@fimbulvetr.bsc.es> <87k2kzlixf.fsf@fimbulvetr.bsc.es> <87lh5dggxb.fsf@fimbulvetr.bsc.es> Date: Mon, 21 Mar 2016 17:51:52 +0100 In-Reply-To: (Peter Maydell's message of "Sun, 20 Mar 2016 19:59:55 +0000") Message-ID: <87fuvjg4ev.fsf@fimbulvetr.bsc.es> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/5] trace: [all] Add "guest_vmem" event List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Paolo Bonzini , Richard Henderson , QEMU Developers , Stefan Hajnoczi , Peter Crosthwaite Peter Maydell writes: > On 20 March 2016 at 18:09, Llu=C3=ADs Vilanova wrot= e: >> Oh! Yes, I seem to remember that code path now, I checked it a >> really long time ago. I was assuming that whenever this event is >> enabled at compile time, I would have to modify QEMU's TLB to store >> the guest physical address (then used by the tracing event). > I guess we could maybe put that into the iotlb. You definitely > don't want it in the CPUTLBEntry struct as that one is space > critical for performance. (If you're really lucky you can > reconstruct the physaddr from the iotlb addr field but I suspect > you can't.) > Once you've decided to take the hit of keeping the paddr in the > TLB it's probably faster to just unconditionally store it rather > than doing a "store if trace event X enabled" test. I meant to make the check at compile time, since we have defines to check w= hich events are enabled/disabled in trace-events. > PS: you probably also want to be able to trace the MemTxAttrs > (which tells you whether you have an S or NS access on ARM, > among other things). I'll keep these in mind for a separate series with extended memory info. Thanks, Lluis